Semiconductor Structure and Method for Manufacturing the Same

A semiconductor structure, comprising at least two adjacent gate stacks or dummy gate stacks positioned on an active region, source-side portions (240a) and drain-side portions (240b) of spacers, wherein

• the source-side portions (240a) and the drain-side portions (240b) of the spacers are positioned on sidewalls of the gate stacks or dummy gate stacks;
• for each of the gate stacks or dummy gate stacks, the source-side portion (240a) has a thickness less than that of the drain-side portion (240b) of the spacer;
• and
• a contact layer (112) is formed on upper surfaces of portions of the active region exposed by the source-side portion (240a) and the drain-side portion (240b) as well as the gate stack or dummy gate stack.

A method for manufacturing a semiconductor structure, comprising:

• a) providing a substrate (100), forming an active region on the substrate (100), forming a gate stack or dummy gate stack on the active region, forming a source extension region (110a) and a drain extension region (110b) at opposite sides of the gate stack or dummy gate stack, forming a spacer on sidewalls of the gate stack or dummy gate stack, and forming a source (111a) and a drain (111b) on portions of the active region exposed by the spacer and the gate stack or dummy gate stack;
• b) forming a first contact layer (112a) on an upper surface of a portion of the active region at the source side;
• c) forming an interlayer dielectric layer (300) to cover the substrate (100);
• d) etching the interlayer dielectric layer (300) to form a contact hole (310) which at least exposes a part of a portion of the active region at the drain side;
• and
• e) forming a second contact layer (112b) on the part of the portion of the active region at the drain side.