Substrate temperature uniformity during rapid substrate heating
AssigneeASM America, Inc.
InventorsMichael W. Halpin, Paul T. Jacobson
Life of this patent
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Abstract
A system and methods are provided for low temperature, rapid baking to remove impurities from a semiconductor surface prior to in-situ deposition. The system is configured with an upper bank of heat elements perpendicular to the gas flow path, such that when the substrate is heated, the temperature across the substrate can be maintained relatively uniform via zoned heating. Advantageously, a short, low temperature process is suitable for advanced, high density circuits with shallow junctions. Furthermore, throughput is greatly improved by the low temperature bake.
Claims25
A method of treating a semiconductor substrate having an exposed semiconductor region, comprising:
- loading the substrate onto a substrate support in a vapor deposition reaction chamber, the substrate support positioned in a portion of the reaction chamber configured to receive a generally horizontal flow of reactant gases above the substrate support along a gas flow path;
- providing an upper bank of substantially linear heat elements above the substrate support, the heat elements of the upper bank being oriented substantially perpendicular to the gas flow path and substantially parallel to an upper surface of the substrate on the substrate support;
- providing a lower bank of heat elements below the substrate support;
- providing power to the upper and lower banks of heat elements to subject the substrate to a bake in a reducing environment for less than about 45 seconds;
- during the bake, maintaining a ratio of power delivered to the upper bank of heat elements to power delivered to the lower bank of heat elements at a value greater than a neutral ratio of power between the upper bank and the lower bank, wherein the neutral ratio of power is defined as a power ratio that is optimized to equalize the substrate temperature and the substrate support temperature;
- stabilizing the substrate temperature after the bake;
- and
- depositing a layer by vapor deposition directly over the semiconductor region after stabilizing the temperature.
A system for vapor deposition on a semiconductor substrate, comprising:
- a reaction chamber;
- a reducing agent source connected to feed a gas containing reducing agent into the reaction chamber;
- one or more reactant sources each connected to feed a reactant gas into the reaction chamber;
- a substrate support housed within the reaction chamber, wherein the reaction chamber is configured to convey a generally horizontal flow of reactant gases above the substrate support along a gas flow path;
- an upper bank of substantially linear heat lamps above the substrate support, each lamp of the upper bank being oriented substantially perpendicular to the gas flow path and substantially parallel to a plane in which a substrate resting upon the substrate support would reside;
- a lower bank of heat lamps below the substrate support;
- and
- a computer programmed to control the upper and lower banks of heat lamps, gas flow from the reducing agent source, and the one or more reactant sources to (1) provide power to the upper and lower banks of lamps to subject a substrate resting upon the substrate support to a bake in the presence of said gas containing the reducing agent for less than about 45 seconds, (2) stabilize the substrate temperature after the bake, and (3) feed said one or more reactant gases into the reaction chamber to deposit a layer by vapor deposition directly onto the substrate after stabilizing the temperature.
Dependencies are inferred from the claim text.