Embedded memory system

Abstract

An embedded memory system is disclosed. A main interface is configured to communicate with an electronic system via a main bus. A memory-sharing auxiliary interface is configured to communicate with the electronic system via a memory-sharing auxiliary bus. An arbiter is configured to arbitrate among the main interface, the memory-sharing auxiliary interface, a primary memory, and a secondary memory. Accordingly, the electronic system is capable of sharing either the primary memory or the secondary memory via the memory-sharing auxiliary interface and the memory-sharing auxiliary bus, and the embedded memory system is capable of sharing a system memory of the electronic system via the memory-sharing auxiliary interface and the memory-sharing auxiliary bus.

Dependencies are inferred from the claim text.