Method of controlling memory, memory control circuit, storage device and electronic device
AssigneeFujitsu Semiconductor Limited
InventorKazuya SAWA
Life of this patent
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AssigneeFujitsu Semiconductor Limited
InventorKazuya SAWA
Estimating the term…
A method of controlling a memory including a first storage area and a second storage area. The method includes determining, in response to a request for writing a write data string, whether the write data string changes a logical value stored in the memory from a first logical value to a second logical value, writing, to the first storage area, a logical value that is located in a position of the write data string and does not change an existing logical value of the memory from the first logical value to the second logical value, and writing the second logical value that is located in a position of the write data string and changes an existing logical value of the memory from the first logical value to the second logical value to the second storage area which is different from the first storage area.
A method of controlling a memory including a first storage area and a second storage area, the method comprising:
A method of controlling a memory including a first storage area and a second storage area, the method comprising:
A memory control circuit for use with a memory including a first storage area and a second storage area, the memory control circuit comprising:
A storage device comprising:
An electronic device comprising:
Dependencies are inferred from the claim text.