Systems and Methods for Data Pre-Coding Calibration

A method for calibrating a data processing circuit, the method comprising:

• providing a first data detector circuit;
• providing a second data detector circuit;
• configuring the first data detector circuit to perform a data detection algorithm including pre-coded compensation on a received data set to yield a first detected output;
• configuring the second data detector circuit to perform the data detection algorithm without pre-coded compensation on a received data set to yield a second detected output;
• and
• selecting between a pre-coded state and a non-pre-coded state based at least in part on the first detected output and the second detected output.

A data storage device, the storage device comprising:

• a storage medium maintaining information;
• a sensor device disposed in relation to the storage medium and operable to sense the information and to provide a corresponding analog signal;
• an analog to digital converter circuit operable to convert a derivative of the analog signal to a series of digital samples;
• an equalizer circuit operable to perform an equalization on the series of digital samples to yield an equalized output;
• a data processing circuit including:
• a first data detector circuit selectably configurable to operate in a pre-coded state, and operable to apply a data detection algorithm on the equalized output to yield a first detected output;
• a second data detector circuit operable to apply the data detection algorithm to the equalized output to yield a second detected output without compensating for pre-coding;
• a first comparator circuit operable to compare the first detected output against a known input to yield a first comparison value;
• a second comparator circuit operable to compare the second detected output against the known input to yield a second comparison value;
• and
• a pre-code selection circuit, wherein the pre-code selection circuit is operable to determine a selectable configuration of the first data detector circuit based at least in part on the first comparison value and the second comparison value.