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US 2012/0112793 A1Published application
Low-Current Logic-Gate Circuit
AssigneeEpcos AG
InventorsErwin Spits, Léon C.M. Van den Oever
Life of this patent
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Abstract
A circuit includes E-mode transistors with gate-source junction, a D-mode transistor with gate-source junction. A component generates a voltage drop between the source of the D-mode transistor and the drain of an E-mode transistor provided as a signal output. A connection is made between this drain of the E-mode transistor and the gate of the D-mode transistor, and a signal input at the gates of the E-mode transistors.
Claims11
A low-current logic-gate circuit, comprising:
- an input transistor and a feedback transistor, each comprising a source, a drain and a gate that is provided to control a channel between the source and the drain, and each having a gate-source junction,
- wherein the input transistor conducts between the source and the drain if a gate-source-voltage that is applied between the gate and the source is more positive than a positive threshold voltage, and does not conduct between the source and the drain otherwise,
- wherein the feedback transistor does not conduct between the source and the drain if a gate-source-voltage that is applied between the gate and the source is more negative than a negative threshold voltage, and conducting between the source and the drain otherwise,
- a component that generates a voltage drop between the source of the feedback transistor and the drain of the input transistor,
- a connection between the drain of the input transistor and the gate of the feedback transistor,
- a further input transistor comprising a source, a drain, a gate that is provided to control a channel between the source and the drain, and a gate-source junction,
- wherein the further input transistor conducts between the source and the drain if a gate-source-voltage that is applied between the gate and the source is more positive than a positive threshold voltage, and does not conduct between the source and the drain otherwise,
- wherein either the drain of the further input transistor is connected to the source of the first input transistor or the source and the drain of the further input transistor are connected to the source and the drain, respectively, of the first input transistor,
- wherein the source of the further input transistor is to be connected to a first voltage level of a supply voltage,
- wherein the drain of the feedback transistor is to be connected to a second voltage level of the supply voltage,
- wherein the gates of the first input transistor and the further input transistor are provided for input signals, and
- wherein the drain of the first input transistor is provided for an output signal.
9 more elements
Dependencies are inferred from the claim text.