# US 2012/0074990 A1 · Injection-Locked Oscillator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2012/0074990 A1 - Document ID: US20120074990A1 - Status: Published application - Kind: A1 - Application number: 13/241,736 - Filed: 2011-09-23 - Published: 2012-03-29 - Earliest claimed: 2010-09-24 - Assignees: Cambridge Silicon Radio Limited - Inventors: Nicolas Sornin - Web page: https://patentgrep.com/patent/US20120074990A1 ## CPC - H03L 7/24: using a reference signal directly applied to the generator - H03L 7/081: provided with an additional controlled phase shifter {(H03L7/0998 takes precedence)} - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) ## Abstract A signal generator for generating an output signal with a frequency that is a multiple of a frequency of a reference signal, the signal generator including an oscillator configured to generate the output signal in dependence on the reference signal and a control signal and a control circuit configured to generate the control signal to comprise a series of pulses in which one or more of the pulses is offset in phase relative to the reference signal, the control circuit thereby being capable of controlling the frequency and/or phase of the output signal. ## Claims ### Claim 1 A signal generator for generating an output signal with a frequency that is a multiple of a frequency of a reference signal, the signal generator comprising: an oscillator configured to generate the output signal in dependence on the reference signal and a control signal; and a control circuit configured to generate the control signal to comprise a series of pulses in which one or more of the pulses is offset in phase relative to the reference signal, the control circuit thereby being capable of controlling the frequency and/or phase of the output signal. ### Claim 2 (depends on 1) A signal generator as claimed in claim 1, wherein the control circuit is arranged to control the phase of the output signal to be offset from the reference signal by controlling the phase of each of the pulses to be offset from the reference signal. ### Claim 3 (depends on 1) A signal generator as claimed in claim 1, wherein the control circuit is arranged to control the frequency of the output signal to be a non-integer multiple of the frequency of the reference signal by controlling the phase of each pulse such that, for a predetermined number of periods of the reference signal, the phase offset between each pulse and the reference signal progressively increases from one period of the reference signal to the next. ### Claim 4 (depends on 3) A signal generator as claimed in claim 3, wherein the control circuit is arranged to control the non-integer multiple to comprise an integer part and a fractional part, the control circuit being arranged to control the phase of the pulses so that the phase difference between each pulse and the reference signal is progressively incremented by the product of the fractional part and the period of the output signal. ### Claim 5 (depends on 1) A signal generator as claimed in claim 1, wherein the control circuit is arranged to input at least one pulse into the oscillator during each period of the reference signal. ### Claim 6 (depends on 1) A signal generator as claimed in claim 1, wherein the control circuit comprises a delay line arranged to delay the reference signal to generate a delayed reference signal, the control circuit being arranged to generate the series of pulses in dependence on the delayed reference signal. ### Claim 7 (depends on 6) A signal generator as claimed in claim 6, wherein the control circuit is arranged to control the phase of each pulse relative to the reference signal by controlling the delay applied to the reference signal by the delay line. ### Claim 8 (depends on 6) A signal generator as claimed in claim 6, wherein the delay line is arranged to delay the reference signal in dependence on a delay control signal. ### Claim 9 (depends on 7) A signal generator as claimed in claim 7, wherein the control circuit is arranged to generate the delay control signal such that, for a predetermined number of periods of the reference signal, the delay control signal has a continuously increasing magnitude. ### Claim 10 (depends on 8) A signal generator as claimed in claim 8, wherein the control circuit is arranged to generate the delay control signal such that it has the form of a sawtooth wave. ### Claim 11 (depends on 9) A signal generator as claimed in claim 9, wherein the control circuit is arranged to control the non-integer multiple to comprise an integer part and a fractional part, the control circuit being arranged to control the phase of the pulses so that the phase difference between each pulse and the reference signal is progressively incremented by the product of the fractional part and the period of the output signal; and wherein the control circuit is arranged to generate the delay control signal to have a frequency equal to a multiple of the frequency of the reference signal and the fractional part of the non-integer multiple. ### Claim 12 (depends on 6) A signal generator as claimed in claim 6, wherein the control circuit comprises a pulse generator arranged to receive the delayed reference signal and generate the series of pulses in dependence on the delayed reference signal. ### Claim 13 (depends on 1) A signal generator as claimed in claim 1, wherein the control circuit comprises an input for receiving a frequency division command and an integrator arranged to integrate the frequency division command to form a frequency division signal. ### Claim 14 (depends on 13) A signal generator as claimed in claim 13, wherein the control circuit comprises an input for receiving a phase modulation command and a summation unit arranged to sum the phase modulation command with the frequency division signal. ### Claim 15 (depends on 14) A signal generator as claimed in claim 14, wherein the control circuit comprises an amplifier arranged to amplify the output of the summation unit, the control circuit being arranged to control the delay applied by the delay line in dependence on the output of the amplifier. ### Claim 16 (depends on 15) A signal generator as claimed in claim 15, wherein the amplifier is a digital multiplier. ### Claim 17 (depends on 15) A signal generator as claimed in claim 15, wherein the control circuit comprises a digital-to-analogue converter arranged to receive the output of the amplifier and form the delay control signal by converting the output of the amplifier into the analogue domain. ### Claim 18 (depends on 1) A signal generator as claimed in claim 1, wherein the oscillator comprises: a resonator for generating an oscillating signal; and a switch arranged to receive the series of pulses and to, when a pulse is received, short the resonator for the duration of that pulse. ### Claim 19 (depends on 1) A radio transmitter or receiver comprising a signal generator as claimed in claim 1.