# US 2012/0074441 A1 · Wafer-level light emitting diode package and method of fabricating the same

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- Number: US 2012/0074441 A1
- Document ID: US20120074441A1
- Status: Published application
- Kind: A1
- Application number: 13/194,317
- Filed: 2011-07-29
- Published: 2012-03-29
- Earliest claimed: 2010-09-24
- Assignees: Seoul Semiconductor Co., Ltd.
- Inventors: Won Cheol SEO; Dae Sung KAL
- Web page: https://patentgrep.com/patent/US20120074441A1

## CPC

- H10H 20/854: characterised by their material, e.g. epoxy or silicone resins
- H10H 20/01: Manufacture or treatment
- H10H 20/01335: {the light-emitting regions comprising nitride materials}
- H10H 20/018: {Bonding of wafers}
- H10H 20/812: within the light-emitting regions, e.g. having quantum confinement structures
- H10H 20/814: having reflecting means, e.g. semiconductor Bragg reflectors
- H10H 20/815: having stress relaxation structures, e.g. buffer layers
- H10H 20/82: Roughened surfaces, e.g. at the interface between epitaxial layers
- H10H 20/821: of the light-emitting regions, e.g. non-planar junctions
- H10H 20/825: containing nitrogen, e.g. GaN
- H10H 20/831: characterised by their shape
- H10H 20/8312: {extending at least partially through the bodies}
- H10H 20/8314: {extending at least partially onto an outer side surface of the bodies}
- H10H 20/833: Transparent materials
- H10H 20/835: {Reflective materials}
- H10H 20/84: Coatings, e.g. passivation layers or antireflective coatings
- H10H 20/841: Reflective coatings, e.g. dielectric Bragg reflectors
- H10H 20/8506: {Containers}
- H10H 20/851: Wavelength conversion means
- H10H 20/8512: {Wavelength conversion materials}
- H10H 20/8514: {characterised by their shape, e.g. plate or foil}
- H10H 20/8515: {not being in contact with the bodies}
- H10H 20/855: Optical field-shaping means, e.g. lenses
- H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls
- H10H 20/8582: {characterised by their shape}
- H10H 20/8585: {being an interconnection}
- H10H 29/10: Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 (active-matrix LED displays H10H29/30)
- H10H 29/14: comprising multiple light-emitting semiconductor components
- H10H 20/032: {of electrodes}
- H10H 20/034: {of coatings}
- H10H 20/036: {of packages}
- H10H 20/0361: {of wavelength conversion means}
- H10H 20/0362: {of encapsulations}
- H10H 20/0364: {of interconnections}
- H10H 20/0365: {of means for heat extraction or cooling}
- H10H 20/819: characterised by their shape, e.g. curved or truncated substrates
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS

## Abstract

Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.

## Claims

### Claim 1

A light emitting diode (LED) package, comprising:
a semiconductor stack comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer;
a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer;
a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes;
a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and
a protective insulation layer covering a sidewall of the semiconductor stack.

### Claim 2 (depends on 1)

The LED package of claim 1, further comprising a wavelength converter arranged on a second side of the semiconductor stack, the second side being opposite to the first side of the semiconductor stack.

### Claim 3 (depends on 2)

The LED package of claim 2, wherein the wavelength converter comprises a phosphor sheet or an impurity-doped single crystal substrate.

### Claim 4 (depends on 2)

The LED package of claim 2, wherein the wavelength converter comprises a side surface flush with a side surface of the protective insulation layer.

### Claim 5 (depends on 1)

The LED package of claim 1, wherein the protective insulation layer comprises a distributed Bragg reflector.

### Claim 6 (depends on 1)

The LED package of claim 1, wherein the first conductive type semiconductor layer comprises a roughened surface.

### Claim 7 (depends on 1)

The LED package of claim 1, further comprising an insulation layer arranged on side surfaces of the first bump and the second bump.

### Claim 8 (depends on 7)

The LED package of claim 7, further comprising a dummy bump arranged between the first bump and the second bump.

### Claim 9 (depends on 1)

The LED package of claim 1, further comprising a substrate comprising a first through-hole and a second through-hole, the first bump and the second bump being arranged in the first through-hole and the second through-hole, respectively.

### Claim 10 (depends on 9)

The LED package of claim 9, wherein the substrate comprises sapphire or silicon.

### Claim 11 (depends on 1)

The LED package of claim 1, further comprising:
a first contact layer comprising first contact sections contacting the first conductive type semiconductor layer in the plurality of contact holes and a connecting section connecting the first contact sections to each other; and
a second contact layer contacting the second conductive type semiconductor layer,
wherein the protective insulation layer comprises a first insulation layer and a second insulation layer, the first insulation layer being arranged between the first contact layer and the second contact layer and covering the second contact layer, and the second insulation layer being arranged between the semiconductor stack and the first contact layer and covering the first contact layer,
wherein the first bump is electrically connected to the first contact layer, and the second bump is electrically connected to the second contact layer.

### Claim 12 (depends on 11)

The LED package of claim 11, further comprising:
a first electrode pad contacting the first contact layer through a first contact hole arranged in the second insulation layer; and
a second electrode pad contacting the second contact layer though a second contact hole arranged in the second insulation layer and the first insulation layer,
wherein the first bump and the second bump contact the first electrode pad and the second electrode pad, respectively.

### Claim 13 (depends on 11)

The LED package of claim 11, wherein at least one of the first insulation layer and the second insulation layer comprises a distributed Bragg reflector.

### Claim 14 (depends on 1)

A light emitting diode (LED) module, comprising:
a circuit board;
the LED package of claim 1 arranged on the circuit board; and
a lens to adjust an orientation angle of light emitted from the LED package.

### Claim 15 (depends on 14)

The LED module of claim 14, wherein the circuit board comprises a metal core printed circuit board (MC-PCB), and a plurality of the LED packages is arranged on the MC-PCB.

### Claim 16

A method of fabricating a light emitting diode (LED) package, the method comprising:
forming a semiconductor stack on a first substrate, the semiconductor stack comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer;
patterning the semiconductor stack to form a chip separation region;
patterning the second conductive type semiconductor layer and the active layer to form a plurality of contact holes exposing the first conductive type semiconductor layer;
forming a protective insulation layer covering a sidewall of the semiconductor stack in the chip separation region; and
forming a first bump and a second bump on the semiconductor stack,
wherein the first bump is electrically connected to the first conductive type semiconductor layer via the plurality of contact holes, and the second bump is electrically connected to the second conductive type semiconductor layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein the first substrate comprises an impurity for converting a wavelength of light generated in the active layer.

### Claim 18 (depends on 16)

The method of claim 16, further comprising:
removing the first substrate to expose the first conductive type semiconductor layer; and
attaching a phosphor sheet to the exposed first conductive type semiconductor layer.

### Claim 19 (depends on 16)

The method of claim 16, wherein forming the protective insulation layer comprises forming a first insulation layer and a second insulation layer.

### Claim 20 (depends on 19)

The method of claim 19, further comprising:
forming a second contact layer on the second conductive type semiconductor layer;
forming the first insulation layer to cover the second contact layer and sidewalls of the plurality of contact holes, the first insulation layer comprising openings exposing the first conductive type semiconductor layer in the plurality of contact holes;
forming a first contact layer on the first insulation layer, the first contact layer comprising:
contact sections contacting the first conductive type semiconductor layer exposed in the plurality of contact holes; and
a connecting section connecting the contact sections to each other;
forming the second insulation layer to cover the first contact layer;
patterning the first insulation layer and the second insulation layer to form an opening exposing the first contact layer;
forming an opening exposing the second contact layer; and
forming a first electrode pad and a second electrode pad on the second insulation layer, the first electrode pad and the second electrode pad to be respectively connected to the first contact layer and the second contact layer through the openings,
wherein the first bump and the second bump are electrically connected to the first electrode pad and the second electrode pad, respectively.

### Claim 21 (depends on 20)

The method of claim 20, wherein forming the first bump and the second bump comprises forming an insulation layer pattern having openings exposing regions of the first electrode pad and the second electrode pad, and plating the exposed regions of the first electrode pad and the second electrode pad with a metallic material.

### Claim 22 (depends on 21)

The method of claim 21, further comprising:
forming a dummy bump between the first bump and the second bump.

### Claim 23 (depends on 20)

The method of claim 20, further comprising bonding a second substrate on the first electrode pad and the second electrode pad before forming the first bump and the second bump, wherein forming the first bump and the second bump comprises forming a plurality of through-holes in the second substrate, filling the through-holes with a metallic material, and bonding the metallic material to the first electrode pad and the second electrode pad.

### Claim 24 (depends on 23)

The method of claim 23, further comprising: before bonding the second substrate, forming an insulation layer covering the first electrode pad and the second electrode pads, and patterning the insulation layer to expose the first electrode pad and the second electrode pad.

### Claim 25

A light emitting diode (LED) package, comprising:
a plurality of light emitting cells each comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer;
a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer of each of the light emitting cells, the contact holes exposing the first conductive type semiconductor layer of each of the light emitting cells;
a protective insulation layer covering a sidewall of each of the light emitting cells;
a connector located arranged on a first side of the light emitting cells and electrically connecting two adjacent light emitting cells to each other;
a first bump arranged on the first side of the light emitting cells and electrically connected to the first conductive type semiconductor layer via the plurality of contact holes of a first light emitting cell of the light emitting cells; and
a second bump arranged on the first side of the light emitting cells and electrically connected to the second conductive type semiconductor layer of a second light emitting cell of the light emitting cells.

### Claim 26 (depends on 25)

The LED package of claim 25, further comprising a wavelength converter arranged on a second side of the plurality of light emitting cells, the second side being opposite to the first side of the plurality of light emitting cells.

### Claim 27 (depends on 26)

The LED package of claim 26, wherein the wavelength converter comprises a phosphor sheet or an impurity-doped single crystal substrate.

### Claim 28 (depends on 26)

The LED package of claim 26, wherein the wavelength converter has a side surface flush with a side surface of the protective insulation layer.

### Claim 29 (depends on 25)

The LED package of claim 25, wherein the protective insulation layer comprises a distributed Bragg reflector.

### Claim 30 (depends on 25)

The LED package of claim 25, wherein the first conductive type semiconductor layer of each of the light emitting cells comprises a roughened surface.

### Claim 31 (depends on 25)

The LED package of claim 25, further comprising an insulation layer arranged on side surfaces of the first bump and the second bump.

### Claim 32 (depends on 31)

The LED package of claim 31, further comprising a dummy bump arranged between the first bump and the second bump.

### Claim 33 (depends on 25)

The LED package of claim 25, further comprising a substrate comprising a first through-hole and a second through-hole, the first bump and the second bump being arranged in the first through-hole and the second through-hole, respectively.

### Claim 34 (depends on 33)

The LED package of claim 33, wherein the substrate comprises grooves arranged in a lower surface thereof and filled with a metallic material.

### Claim 35 (depends on 25)

The LED package of claim 25, further comprising:
a first contact layer comprising first contact sections contacting the first conductive type semiconductor layer of each of the light emitting cells in the plurality of contact holes and a connecting section connecting the first contact sections to each other; and
a second contact layer contacting the second conductive type semiconductor layer of each of the light emitting cells,
wherein the protective insulation layer comprises a first insulation layer and a second insulation layer, the first insulation layer being arranged between the first contact layer and the second contact layer and covering the second contact layer, and a second insulation layer being arranged between the semiconductor stack and the first contact layer and covering the first contact layer,
wherein the connector is arranged directly under the second insulation layer, the connector to connect the first contact layer and the second contact layer to each other, the first bump contacting the first contact layer of the first light emitting cell, and the second bump is contacting the second contact layer of the second light emitting cell.

### Claim 36 (depends on 35)

The LED package of claim 35, further comprising:
a first electrode pad contacting the first contact layer of the first light emitting cell through a first contact hole arranged in the second insulation layer; and
a second electrode pad contacting the second contact layer of the second light emitting cell though a second contact hole arranged in the second insulation layer and the first insulation layer,
wherein the first bump and the second bump contact the first electrode pad and the second electrode pad, respectively.

### Claim 37 (depends on 36)

The LED package of claim 36, wherein the connector is arranged at a same level as the first electrode pad and the second electrode pad.

### Claim 38 (depends on 36)

The LED package of claim 36, further comprising a third insulation layer being arranged between the dummy bump and the connector.

### Claim 39 (depends on 35)

The LED package of claim 35, wherein at least one of the first insulation layer and second insulation layer comprises a distributed Bragg reflector.

### Claim 40 (depends on 25)

A light emitting diode module, comprising:
a circuit board;
the LED package of claim 25 arranged on the circuit board; and
a lens to adjust an orientation angle of light emitted from the LED package.

### Claim 41 (depends on 40)

The LED module of claim 40, wherein the circuit board comprises a metal core printed circuit board (MC-PCB), and a plurality of the LED packages are mounted on the MC-PCB.

### Claim 42

A method of fabricating a light emitting diode (LED) package, the method comprising:
forming a semiconductor stack on a first substrate, the semiconductor stack comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer;
patterning the semiconductor stack to form a chip separation region and a light emitting cell separation region;
patterning the second conductive type semiconductor layer and the active layer to form a plurality of light emitting cells, each light emitting cell comprising a plurality of contact holes exposing the first conductive type semiconductor layer;
forming a protective insulation layer covering a sidewall of the semiconductor stack in the chip separation region and the light emitting cell separation region;
forming a connector connecting adjacent light emitting cells to each other in series; and
forming a first bump and a second bump on the plurality of light emitting cells,
wherein the first bump is electrically connected to the first conductive type semiconductor layer via the plurality of contact holes of a first light emitting cell of the light emitting cells, and the second bump being electrically connected to the second conductive type semiconductor layer of a second light emitting cell of the light emitting cells.

### Claim 43 (depends on 42)

The method of claim 42, wherein the first substrate comprises an impurity for converting a wavelength of light generated in the active layer

### Claim 44 (depends on 42)

The method of claim 42, further comprising:
removing the first substrate to expose the light emitting cells; and
attaching a phosphor sheet to the exposed light emitting cells.

### Claim 45 (depends on 42)

The method of claim 42, wherein forming the protective insulation layer comprises forming a first insulation layer and a second insulation layer.

### Claim 46 (depends on 45)

The method of claim 45, further comprising:
forming a second contact layer on the second conductive type semiconductor layer of each of the light emitting cells;
forming the first insulation layer to cover the second contact layer of each of the light emitting cells and sidewalls of the plurality of contact holes, the first insulation layer comprising openings exposing the first conductive type semiconductor layer in the plurality of contact holes;
forming a first contact layer on the first insulation layer of each of the light emitting cells, the first contact layer comprising:
contact sections contacting the first conductive type semiconductor layer exposed in the plurality of contact holes; and
a connecting section connecting the contact sections to each other;
forming the second insulation layer to cover the first contact layer of each of the light emitting cells;
patterning the first insulation layer and the second insulation layer of each of the light emitting cells to form an opening exposing the first contact layer;
forming an opening exposing the second contact layer; and
forming a first electrode pad and a second electrode pad on the second insulation layer, the first electrode pad and the second electrode pad to be respectively connected to the first contact layer of the first light emitting cell and the second contact layer of the second light emitting cell through the openings,
wherein the connector is formed on the second insulation layer and contacts the first contact layer and second contact layer of each of the adjacent light emitting cells through the openings, and the first bump and the second bump are electrically connected to the first electrode pad and the second electrode pad, respectively.

### Claim 47 (depends on 46)

The method of claim 46, wherein forming the first bump and the second bump comprises forming an insulation layer pattern having openings exposing regions of the first electrode pad and the second electrode pad, and plating the exposed regions of the first electrode pad and the second electrode pad with a metallic material.

### Claim 48 (depends on 47)

The method of claim 47, further comprising:
forming a dummy bump between the first bump and the second bump.

### Claim 49 (depends on 48)

The method of claim 48, further comprising: before forming the dummy bump, forming a third insulation layer to cover the first electrode pad, the second electrode pad, and the connector, and patterning the third insulation layer to expose the first electrode pad and the second electrode pad.

### Claim 50 (depends on 46)

The method of claim 46, wherein forming the first bump and the second bump comprises forming a plurality of through-holes in the insulation substrate, filling the through-holes with a metallic material, and bonding the metallic material to the first electrode pad and the second electrode pad.

### Claim 51 (depends on 50)

The method of claim 50, further comprising: before forming the dummy bump, forming a third insulation layer to cover the first electrode pad, the second electrode pad, and the connector, and patterning the third insulation layer to expose the first electrode pad and the second electrode pad.