# US 2012/0073868 A1 · Multilayer printed wiring board and method for manufacturing multilayer printed wiring board

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- Number: US 2012/0073868 A1
- Document ID: US20120073868A1
- Status: Published application
- Kind: A1
- Application number: 13/314,641
- Filed: 2011-12-08
- Published: 2012-03-29
- Earliest claimed: 2008-12-05
- Assignees: Ibiden Co., Ltd.
- Inventors: Yoshinori TAKENAKA; Takeshi NAKAMURA
- Web page: https://patentgrep.com/patent/US20120073868A1

## CPC

- H05K 3/465: {by applying an insulating layer having channels for the next circuit layer}
- H10W 70/635: {Through-vias}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/6565: {recessed into the surface of the package substrates, interposers, or redistribution layers}
- H10W 70/685: comprising multiple insulating layers
- H05K 2201/0373: Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool
- H05K 2201/0949: Pad close to a hole, not surrounding the hole
- H05K 2201/09736: Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
- H05K 2201/10674: Flip chip
- H10P 72/7424: {used as a support during the manufacture of self-supporting substrates}
- H10W 70/655: Fan-out layouts
- H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/90: Bond pads, in general
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- Y10T 29/49126: Assembling bases
- Y10T 29/49128: Assembling formed circuit to base
- Y10T 29/4913: Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T 29/49155: Manufacturing circuit on or in base
- Y10T 29/49156: with selective destruction of conductive paths
- Y10T 29/49165: by forming conductive walled aperture in base
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A method for manufacturing a multilayer printed wiring board includes preparing a first resin insulative material having a first conductive circuit on or in the first resin insulative material, forming a second resin insulative material on the first resin insulative material and the first conductive circuit, forming on a surface of the second resin insulative material a first concave portion to be filled with a conductive material for formation of a second conductive circuit, forming on the surface of the second resin insulative material a pattern having a second concave portion and post portions to be filled with the conductive material for formation of a plane conductor, and filling the conductive material in the first concave portion and the second concave portion such that the second conductive circuit and the plane conductor are formed.

## Claims

### Claim 1

A multilayer printed wiring board, comprising:
a first resin insulative material;
a first conductive circuit formed on or in the first resin insulative material;
a second resin insulative material formed on the first resin insulative material and the first conductive circuit, the second resin insulative material having a surface on which a first concave portion and a pattern with a second concave portion and a plurality of post portions are formed;
a second conductive circuit formed in the first concave portion; and
a plane conductor formed in the pattern,
wherein the plane conductor has a surface which is substantially leveled with the surface of the second resin insulative material.

### Claim 2 (depends on 1)

The multilayer printed wiring board according to claim 1, wherein the post portions have side surfaces tapering toward the surface of the second resin insulative material.

### Claim 3 (depends on 1)

The multilayer printed wiring board according to claim 1, wherein the post portions are integrated with the second resin insulative material.

### Claim 4 (depends on 1)

The multilayer printed wiring board according to claim 1, wherein the post portions are formed in a zigzag or a matrix format.

### Claim 5 (depends on 1)

The multilayer printed wiring board according to claim 1, further comprising:
a solder resist layer formed on the second resin insulative material, the second conductive circuit and plane conductor;
an opening formed in the solder resist layer so as to expose a portion of the second conductive circuit; and
a solder bump formed on the second conductive circuit exposed through the opening.