Regulating atomic memory operations to prevent denial of service attack

A method comprising:

• identifying a termination sequence for an atomic memory operation executed by a first thread;
• associating a timer with the first thread, the timer to count a period of a prevention window for the first thread;
• and
• preventing the first thread from execution of a memory cluster operation after completion of the atomic memory operation until the prevention window has passed.

A system comprising:

• a processor including at least one core to execute instructions, the at least one core including:
• a front end unit to fetch and decode an instruction;
• a renamer to associate at least one operand of the instruction with a physical register;
• an execution unit coupled to the front end unit to execute the instruction using the at least one operand;
• a memory execution unit (MEU) coupled to the execution unit to handle incoming memory requests from the execution unit;
• and
• a regulator coupled to the MEU to delay at least one atomic memory operation requested by a first thread from being provided to the MEU responsive to termination of a prior atomic memory operation requested by the first thread;
• and
• a dynamic random access memory (DRAM) coupled to processor.