Semiconductor storage device, memory control device, and control method of semiconductor memory
AssigneeKabushiki Kaisha Toshiba
InventorsKenji SAKAUE, Yoshio Mochizuki
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Abstract
According to one embodiment, a semiconductor storage device includes a semiconductor memory which includes two or more cell peripheral circuits and two or more storage cells at least one of reading and writing of which is controlled by the cell peripheral circuits in each of the cell peripheral circuits. Further, the semiconductor storage device includes a memory control unit configured to instruct to form 1 symbol as a unit for creating an error correction code by the data held by the storage cells controlled by the same cell peripheral circuit and creating an error correction code to the symbol created base of the instruction.
Claims18
A semiconductor storage device comprising:
- a semiconductor memory comprising two or more cell peripheral circuits and two or more storage cells at least one of reading and writing of which is controlled by the cell peripheral circuits in each of the cell peripheral circuits;
- and
- a memory controller comprising a control unit configured to instruct to form 1 symbol as a unit for creating an error correction code by the data held by the storage cell controlled by the same cell peripheral circuit and a coding unit configured to create an error correction code to a symbol formed based on the instruction of the control unit.
A memory control device configured to control writing and reading of a semiconductor memory which comprises two or more cell peripheral circuits and two or more storage cells, at least one of reading and writing of which is controlled by the cell peripheral circuits in each of the cell peripheral circuits, comprising:
- a control unit configured to instruct to form 1 symbol as a unit for creating an error correction code by the data held by the storage cells controlled by the same cell peripheral circuits;
- and
- a coding unit configured to create an error correction code to a symbol formed based on the instruction of the control unit.
A control method of a semiconductor memory, comprising:
- causing at least one of reading and writing of two or more storage cells that configure a semiconductor memory to be controlled by two or more cell peripheral circuits that configure the semiconductor memory in each of the cell peripheral circuits;
- instructing to form 1 symbol as a unit for creating an error correction code by the data held by the storage cells controlled by the same cell peripheral circuit;
- and
- creating an error correction code to the symbol formed based on the instruction.
Dependencies are inferred from the claim text.