Semiconductor device
OwnerTsutomu Unesaki, Kazuki Okawarainventors
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Abstract
According to one embodiment, a semiconductor device includes a NAND flash memory, an error correction unit, and a table. The NAND flash memory is configured to hold data. The error correction unit detects and corrects errors in the data. The table holds information on an error correction method associated with each piece of data. The error correction unit selects an error correction method to be applied for each piece of data in accordance with the information in the table.
Claims18
A semiconductor device comprising:
- a NAND flash memory configured to hold data;
- an error correction unit which detects and corrects errors in the data;
- and
- a table which holds information on an error correction method associated with each piece of data,
- wherein the error correction unit selects an error correction method to be applied for each piece of data in accordance with the information in the table.
A data access method of a semiconductor device which includes error correction units to detect and correct errors in data in accordance with error correction methods different from each other, the method comprising:
- reading data from a NAND flash memory;
- referring to a table for an error correction method applied to the read data;
- activating an error correction unit corresponding to the error correction method applied to the read data and deactivating another error correction unit in accordance with the reference to the table;
- and
- detecting and correcting errors in the read data by the enabled error correction unit.
A data access method of a semiconductor device which includes error correction units to detect and correct errors in data in accordance with error correction methods different from each other, the method comprising:
- referring to a table for an error correction method to be applied to write data;
- activating an error correction unit corresponding to the error correction method to be applied to the write data and deactivating another error correction unit in accordance with the reference to the table;
- generating a parity for the write data by the enabled error correction unit;
- and
- writing the write data and the parity to a NAND flash memory.
Dependencies are inferred from the claim text.