Circuitry on an integrated circuit for performing or facilitating oscilloscope, jitter, and/or bit-error-rate tester operations

Test circuitry on an integrated circuit (“IC”) for use in testing serial data signal transmission comprising:

• transmitter circuitry for outputting the serial data signal;
• error detector circuitry;
• loop-back circuitry for selectively applying the serial data signal output by the transmitter circuitry to the error detector circuitry so that the error detector circuitry can perform a bit error rate (“BER”) operation on the serial data signal from the loop-back circuitry;
• and
• calibration circuitry for controlling at least one operating parameter of at least one of the transmitter circuitry and the error detector circuitry to affect a result of the BER operation.

Test circuitry on an integrated circuit (“IC”) for use in testing serial data signal transmission comprising:

• transmitter circuitry for outputting the serial data signal in which timing of successive bits is based at least in part on a clock signal produced by clock generator circuitry;
• circuitry for recovering data information from the serial data signal;
• circuitry for recovering clock information from the serial data signal;
• and
• circuitry for performing a bit error rate (“BER”) analysis on the data information;
• wherein the circuitry for performing can use a selectable one of the clock signal and the clock information as at least part of a basis for timing operations of the circuitry for performing.