Multi-core power management
AssigneeApple Inc.
InventorsDavid G. Conroy, Guy Sotomayor
Life of this patent
Estimating the term…
Abstract
The disclosed embodiments provide a system that operates a processor in a multi-core processor system. During operation, the system detects the creation of an asynchronous wakeup event for the processor. In response to detecting the creation of the asynchronous wakeup event, when the processor is subsequently placed into an idle state, the system configures the processor to resume operation at a reduced frequency that is a fraction of an operating frequency for the multi-core processor system, wherein the reduced frequency allows more power to be allocated to other processors in the multi-core processor system.
Claims22
A method for operating a processor in a multi-core processor system, comprising:
- detecting a creation of an asynchronous wakeup event for the processor;
- and
- in response to detecting the creation of the asynchronous wakeup event, when the processor is to be placed into an idle state, configuring the processor to resume operation at a reduced frequency that is a fraction of an operating frequency for the multi-core processor system,
- wherein the reduced frequency allows more power to be allocated to other processors in the multi-core processor system.
A system for operating a processor in a multi-core processor system, comprising:
- a detection mechanism configured to detect a creation of an asynchronous wakeup event for the processor;
- and
- a power-management mechanism configured to:
- prior to placing the processor into an idle state, if the creation of the asynchronous wakeup event has been detected, configure the processor to resume operation at a reduced frequency that is a fraction of an operating frequency for the multi-core processor system,
- wherein the reduced frequency allows more power to be allocated to other processors in the multi-core processor system.
A computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for operating a processor in a multi-core processor system, comprising:
- detecting a creation of an asynchronous wakeup event for the processor;
- and
- in response to detecting the creation of the asynchronous wakeup event, when the processor is to be placed into an idle state, configuring the processor to resume operation at a reduced frequency that is a fraction of an operating frequency for the multi-core processor system,
- wherein the reduced frequency allows more power to be allocated to other processors in the multi-core processor system.
A computer system, comprising:
- a multi-core processor system;
- a power supply for the multi-core processor system;
- a detection mechanism configured to detect a creation of an asynchronous wakeup event in for a processor in the multi-core processor system;
- a power-management mechanism configured to:
- prior to placing the processor into an idle state, if the creation of the asynchronous wakeup event has been detected, configure the processor to resume operation at a reduced frequency that is a fraction of an operating frequency for the multi-core processor system,
- wherein the reduced frequency allows more power to be allocated to other processors in the multi-core processor system;
- and
- an execution mechanism configured to resume operation of the processor at the reduced frequency to service the asynchronous wakeup event when the asynchronous wakeup event occurs.
Dependencies are inferred from the claim text.