Microcode for Transport Triggered Architecture Central Processing Units
AssigneeThe Boeing Company
InventorAlbert A. Williams
Life of this patent
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Abstract
The different advantageous embodiments provide an apparatus comprising a central processing unit, a microcode store, and a number of functional units. The central processing unit utilizes transport triggered architecture and is configured to execute microcoded instructions that allow a single instruction to be executed as multiple instructions. The microcode store includes a number of microcoded instruction implementations. The number of functional units includes a number of useful entry points into the microcode store.
Claims20
An apparatus comprising:
- a microcode store having a number of microcoded instruction implementations;
- a central processing unit in communication with the microcode store, the central processing unit utilizing transport triggered architecture and configured to execute microcoded instructions that allow a single instruction to be implemented as multiple instructions;
- and
- a number of useful entry points into the microcode store, wherein the number of useful entry points are used by the central processing unit to load the number of microcoded instruction implementations from the microcode store.
A method for using microcoded instructions in a transport triggered architecture central processing unit, the method comprising:
- loading a microcoded instruction from a program;
- transferring a useful entry point address of a microcoded instruction implementation in a microcode store to a program counter of a central processing unit;
- loading the microcoded instruction implementation from the microcode store using the useful entry point address;
- and
- determining whether the instruction type of the microcoded instruction implementation loaded from the microcode store is at least one of a return, non-microcoded, and microcoded type instruction.
A reconfigurable system in a transport triggered architecture, the system comprising:
- an integrated nonvolatile microcode store having a number of microcoded instruction implementations;
- a number of functional modules providing a number of useful entry points into the microcode store and further comprising a program counter;
- and
- a control module configured to load the number of microcoded instruction implementations from the integrated nonvolatile microcode store into the program counter of the number of functional modules.
Dependencies are inferred from the claim text.