Data processor for processing decorated instructions with cache bypass

A method of operating a data processing system including a data processor and a memory, the method comprising:

• issuing a data processing instruction by the data processor;
• determining if the data processing instruction is a decorated access instruction with cache bypass;
• determining if the data processing instruction generates a cache hit to a cache;
• and
• when the data processing instruction is determined to be a decorated access instruction with cache bypass and the data processing instruction is determined to generate a cache hit, the method further comprising:
• invalidating a cache entry of the cache associated with the cache hit;
• and
• performing by a memory controller of the memory, a decoration operation specified by the data processor instruction on a location in the memory designated by a target address of the data processor instruction, wherein the performing the decorated access includes the memory controller performing a read of a value of the location in memory, modifying the value to generate a modified value, and writing the modified value to the location.