Double-buffered data storage to reduce prefetch generation stalls
AssigneeTexas Instruments Incorporated
InventorsMatthew D. Pierson, Joseph R.M. Zbiciak
Life of this patent
Estimating the term…
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AssigneeTexas Instruments Incorporated
InventorsMatthew D. Pierson, Joseph R.M. Zbiciak
Estimating the term…
A prefetch unit includes a program prefetch address generator that receives memory read requests and in response to addresses associated with the memory read request generates prefetch addresses and stores the prefetch addresses in slots of the prefetch unit buffer. Each slot includes a buffer for storing a prefetch address, two data buffers for storing data that is prefetched using the prefetch address of the slot, and a data buffer selector for alternating the functionality of the two data buffers. A first buffer is used to hold data that is returned in response to a received memory request, and a second buffer is used to hold data from a subsequent prefetch operation having a subsequent prefetch address, such that the data in the first buffer is not overwritten even when the data in the first buffer is still in the process of being read out.
A method for generating memory prefetches in caching systems, comprising:
A digital system, comprising:
A prefetch unit for provisioning data for anticipated memory prefetches in caching systems, comprising:
Dependencies are inferred from the claim text.