Semiconductor memory controlling device

A semiconductor memory controlling device that writes, into a semiconductor memory chip, host write data requested to be written with a specified logical address used by an information processing apparatus, wherein

• the host write data includes one or more pieces of first data in predetermined units,
• a physical address is information indicating a storage location of the first data within the semiconductor memory chip,
• a first table is stored in a first memory,
• a second table is stored in a second memory,
• a third table is stored in a third memory which is a nonvolatile memory and includes physical addresses each of which indicates a storage location of each of pieces of the first data within the semiconductor memory chip,
• the second table is a subset of the third table and includes the physical addresses each of which indicates the storage location of each of pieces of the first data within the semiconductor memory chip, and
• the first table includes either information specifying a second table entry or information specifying a third table entry, and
• the semiconductor memory controlling device comprises:
• a receiving unit configured to receive the host write data;
• a controlling unit configured to write each of the pieces of the first data into a storage location in which no data has been written in a storage region from which data has been erased within a storage region of the semiconductor memory chip;
• and
• a recording unit configured to either record the first table into the first memory and the second table into the second memory, or record the first table into the first memory and the third table into the third memory.