Remote multiplexing devices on a serial peripheral interface bus

A serial peripheral interface bus, comprising:

• a serial peripheral interface master device including:
• (a) a master output slave input pin;
• (b) a master input slave output pin;
• (c) a clock output pin;
• and
• (d) a slave select output pin;
• a serial peripheral interface multiplex slave device and a plurality of serial peripheral interface non-multiplex slave devices, each of the multiplex and non-multiplex slave devices including:
• (a) a master output slave input pin coupled to the master output slave input pin of the master device;
• (b) a master input slave output pin coupled to the master input slave output pin of the master device;
• (c) a clock input pin coupled to the clock output pin of the master device;
• and
• (d) a slave select input pin;
• and
• wherein the slave select output pin of the master device is coupled to the slave select input pin of the multiplex slave device;
• and
• wherein the multiplex slave device includes a plurality of slave select output pins, each slave select output pin of the multiplex slave device being coupled to the slave select input pin associated with one of the non-multiplex slave devices.

A method of communicating between a master device and a plurality of slave devices on a serial peripheral interface bus, comprising:

• initializing the serial peripheral interface bus to route data output from the master device to an addressable multiplex slave device;
• the master device sending a slave identification code to the multiplex slave device;
• the multiplex slave device providing a slave select signal only to a slave device associated with the slave identification code received from the master device;
• the selected slave device activating an output pin to the master in response to receiving the slave select signal from the multiplex slave;
• and
• sending data between the master device and the selected slave device.

A serial peripheral interface bus, comprising:

• a serial peripheral interface master device including a master output slave input pin, a master input slave output pin, and a clock output pin coupled to a first serial peripheral interface multiplex slave device, a first plurality of serial peripheral interface non-multiplex slave devices associated with the first multiplex slave device, a second serial peripheral interface multiplex slave device, and a second plurality of serial peripheral interface non-multiplex slave devices associated with the second multiplex slave device, wherein the master device further includes a first slave select output pin coupled to a slave select input pin of the first multiplex slave device and a second slave select output pin coupled to a slave select input pin of the second SPI multiplex slave device;
• wherein the first multiplex slave device includes an independent slave select output pin coupled to each one of the first plurality of non-multiplex slave devices for sending an activation signal to a selected slave device in response to receiving a signal on the first slave select output pin of the master device and a command from the master device containing an identification code for the selected slave;
• and
• wherein the second multiplex slave device includes an independent slave select output pin coupled to each one of the second plurality of non-multiplex slave devices for sending an activation signal to a selected slave device in response to receiving a signal on the second slave select output pin of the master device and a command from the master device containing an identification code for the selected slave.