US 2012/0072199 A1 · METHOD AND PROGRAM FOR ESTIMATING OPERATION OF PROGRAM

Abstract

The present invention is achieved as software which operates on a computer system and which performs calculation by receiving various data as inputs, and which outputs values. The present invention is applicable to a coarse-grained system architecture model including the foregoing event-driven simulation and receives, as inputs, execution time T and the number of memory accesses, N, in the simulation step of the model. Thus, various estimates at the occurrence of memory access conflict are obtained at a simulation speed sufficient for evaluating the effect of the memory access conflict and comparing it with many alternative architectures without information on the correct timing of memory accesses in consideration of memory synchronous accesses and arbitration. The results of this simulation are estimated simulation-step execution time T′ under memory access conflict and memory-bandwidth utilization factors {U′i} in individual simulation steps under memory access conflict.

Claims7

Dependent claims

A method for evaluating a probability of memory access conflict of bus masters while a program expressed in a simulation model is in operation, in a system in which the bus masters including a processor, an accelerator, and a controller can access a memory, the method comprising the steps of:

measuring, for the simulation model, an execution time and a number of memory accesses for each simulation step for each of the different bus masters or preparing measurement values in advance;
calculating an utilization factor of a memory bandwidth for each of the different bus masters using the values of the execution time and the number of memory accesses;
and
calculating the probability of memory access conflict among the different bus masters using a formula including the product of the utilization factors of the memory bandwidths of the different bus masters.

1 more element

A computer readable article of manufacture tangibly embodying non-transitory computer readable instructions which, when executed, cause a computer to carry out the steps of a method for evaluating a probability of memory access conflict of bus masters while a program expressed in a simulation model is in operation, in a system in which the bus masters including a processor, an accelerator, and a controller can access a memory, the method comprising the steps of:

measuring, for the simulation model, an execution time and a number of memory accesses for each simulation step for each of the different bus masters or preparing measurement values in advance;
calculating an utilization factor of a memory bandwidth for each of the different bus masters using the values of execution time and the number of memory accesses;
and
calculating the probability of memory access conflict among the different bus masters using a formula including the product of the utilization factors of the memory bandwidths of the different bus masters.

1 more element

Dependencies are inferred from the claim text.

Method and program for estimating operation of program

Life of this patent

Method and program for estimating operation of program

Life of this patent

Abstract

Claims7