Methods of forming integrated circuits

A method of forming an N-doped silicon-containing layer, the method comprising:

• epitaxially forming at least one silicon-containing layer in recessed source/drain (S/D) regions adjacent to sidewalls of a gate structure;
• epitaxially forming an N-doped silicon-containing layer over the at least one silicon-containing layer, the N-doped silicon-containing layer having a dopant concentration higher than that of the at least one silicon-containing layer;
• and
• annealing the N-doped silicon-containing layer so as to drive dopants of N-doped silicon-containing layer to the S/D regions.

A method of forming an integrated circuit, the method comprising:

• forming a gate structure over a substrate;
• recessing source/drain (S/D) regions adjacent to sidewalls of the gate structure;
• epitaxially forming at least one undoped silicon layer over the recessed S/D regions, wherein the at least one silicon layer has a thickness between about 50 angstroms (Å) and about 100 Å;
• epitaxially forming an N-type doped silicon layer over the at least one silicon layer, the N-type doped silicon layer having a thickness between about 50 angstroms (Å) and about 100 Å;
• and
• annealing the N-type doped silicon layer so as to drive N-type dopants of the N-type doped silicon layer to the S/D regions, wherein the method is free from including a S/D ion implantation between epitaxially forming the N-type doped silicon layer and annealing the N-type doped silicon layer.