Method of forming integrated circuits
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsDe-Wei YU, Chun Hsiung TSAI, Yu-Lien HUANG, Chien-Tai CHAN, Wen-Sheh HUANG
Life of this patent
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Abstract
A method of forming an integrated circuit includes forming a gate structure over a substrate. A plasma doping (PLAD) process is performed to at least a portion of the substrate that is adjacent to the gate structure. The doped portion of the substrate is annealed in an ambient with an oxygen-containing chemical.
Claims21
A method of forming an integrated circuit, the method comprising:
- forming a gate structure over a substrate;
- performing, after the formation of the gate structure, a plasma doping (PLAD) process to at least a portion of the substrate that is adjacent to the gate structure so as to form a doped portion of the substrate;
- and
- annealing the doped portion of the substrate in an ambient with an oxygen-containing chemical to cause the oxygen-containing chemical interacting with dopants of the doped portion to form oxidized material on a surface of the doped portion,
- an amount of the oxidized material being controlled such that a subsequent strain structure is capable of being substantially uniformly formed on the oxidized material.
(canceled)
A method of forming a Fin field effect transistor (FinFET), the method comprising:
- forming a gate structure over at least one fin structure of a substrate;
- performing, after the formation of the gate structure, a plasma doping (PLAD) process to a portion of the at least one fin structure that are adjacent to the gate structure so as to form a dopant-rich layer over the portion of the at least one fin structure;
- and
- annealing the dopant-rich layer in an ambient with an oxygen-containing chemical so as to form lightly doped drains (LDDs) of the FinFET and to cause the oxygen-containing chemical interacting with dopants of the dopant-rich layer to form oxidized material on a surface of the dopant-rich layer,
- an amount of the oxidized material being controlled such that a subsequent strain structure is capable of being substantially uniformly formed on the oxidized material.
(canceled)
A method of forming a Fin field effect transistor (FinFET), the method comprising:
- forming a gate structure over at least one fin structure of a substrate;
- performing, after the formation of the gate structure, a plasma doping (PLAD) process to a portion of the at least one fin structure that are adjacent to the gate structure so as to form a dopant-rich layer over the portion of the at least one fin structure, wherein the PLAD process has a bias voltage substantially equal to or less than about 0.5 KeV, such that the dopant-rich layer is substantially conformally deposited on the portions of the at least one fin structure;
- and
- annealing the dopant-rich layer in an ambient with oxygen having a volume percentage ranging from about 2% to about 10% so as to form lightly doped drains (LDDs) of the FinFET and to cause the oxygen-containing chemical interacting with dopants of the dopant-rich layer to form oxidized material on a surface of the dopant-rich layer,
- an amount of the oxidized material being controlled such that a subsequent strain structure is capable of being substantially uniformly formed on the oxidized material.
(canceled)
21-23. (canceled)
Dependencies are inferred from the claim text.