Amplitude Monitor For High-Speed Signals
AssigneeRambus Inc.
InventorRamin Farjad-Rad
Life of this patent
Estimating the term…
Abstract
A serial communication system includes a receiver with an amplitude monitor. The amplitude monitor compares the input signal with a reference level in response to a sample clock. The sample clock is periodically phase shifted with respect to the incoming data so the amplitude monitor is sure to sample an incoming data eye at or near the peak amplitude over a selected sample period. The amplitude detector notes the detection of an input signal if the input signal surpasses the reference level for any sample phase. The amplitude monitor experiments with different sample-clock phases over a number of data symbols, but is capable of measuring amplitude fast enough to resolve amplitude-based signals used for rate negotiation.”
Claims19
A method of detecting the presence of an input signal at an input port of a receiver, comprising:
- generating a clock signal having a plurality of clock periods, each period between a pair of edges of the clock signal;
- sampling a signal parameter exhibited at the input port at a plurality of sampling instants, the plurality of sampling instants corresponding to respective clock periods and having different phase offsets relative to the clock signal;
- and
- detecting the presence of the input signal if at least a predetermined number of the samples meet a threshold.
A receiver, comprising:
- an input port;
- clock circuitry to generate a clock signal having a plurality of clock periods, each period between a pair of edges of the clock signal;
- a sampler to sample a signal parameter exhibited at the input port at a plurality of sampling instants, the plurality of sampling instants corresponding to respective clock periods and having different phase offsets relative to the clock signal;
- and
- detection circuitry to detect the presence of the input signal at the port if at least a predetermined number of the samples meet a threshold.
An apparatus to detecting the presence of an input signal at an input port of a receiver, comprising:
- a clock circuit to generate a clock signal having a clock period;
- means for sampling a signal parameter exhibited at the input port at a plurality of sampling instants, the plurality of sampling instants corresponding to respective clock periods and having different phase offsets relative to the clock signal;
- and
- a circuit to detect the presence of the input signal if at least a predetermined number of the samples meet a threshold.
Dependencies are inferred from the claim text.