Back to results
US 2012/0069674 A1Published application
Flash memory device and related program verification method
AssigneeSamsung Electronics Co., Ltd.
InventorJi-Sang Lee
Life of this patent
Estimating the term…
Abstract
A nonvolatile memory device performs a program operation using an incremental pulse programming (ISPP) scheme in which a plurality of program loops alternate between a coarse-fine verify operation, and a fine verify operation according to a value of a program loop counter.
Claims20
A method of performing a program verification operation of a flash memory device employing an incremental step pulse programming (ISPP) scheme, the method comprising:
- (a) setting a program loop count;
- (b) programming a selected memory cell according to the program loop count;
- (c) determining whether the program loop count satisfies a predetermined verification condition;
- (d) consecutively performing first verification and second verification on the selected memory cell if the program loop count satisfies the predetermined verification condition;
- (e) performing the second verification on the selected memory cell and skipping the first verification if the program loop count does not satisfy the predetermined verification condition;
- (f) determining a program pass or fail status of the selected memory cell;
- and
- (g) increasing the program loop count according to the program pass or fail status and repeating operations (b) through (e),
- wherein (d) is performed at least one time after (e).
6 more elements
A flash memory device that performs a program operation using an incremental step pulse programming (ISPP) scheme, comprising:
- a program loop counter configured to set a program loop count;
- a program control circuit configured to program a selected memory cell according to the program loop count;
- a comparator configured to determine whether the program loop count satisfies a predetermined verification condition;
- a program verify circuit configured to consecutively perform first verification and second verification on the selected memory cell if the program loop count satisfies the predetermined verification condition and to perform only the second verification on the selected memory cell and skip the first verification if the program loop count does not satisfy the predetermined verification condition;
- and
- a pass/fail verify circuit configured to determine a program pass or fail status of the selected memory cell,
- wherein the program loop counter increases the program loop count according to the program pass or fail status, and the first verification and the second verification are consecutively performed at least one time after the second verification is performed and the first verification is skipped.
4 more elements
An electronic system, comprising:
- a host device connected to a memory controller and a nonvolatile memory device, wherein the memory controller controls the nonvolatile memory device to perform a program operation in response to a request from the host, and the nonvolatile memory device performs the program operation using an incremental pulse programming (ISPP) scheme in which a plurality of program loops alternate between a coarse-fine verify operation, and a fine verify operation according to a value of a program loop counter.
Dependencies are inferred from the claim text.