Nonvolatile semiconductor memory device and operating method thereof

A nonvolatile semiconductor memory device comprising:

• a memory cell array having electrically rewritable nonvolatile memory cells arranged therein;
• and
• a control unit configured to perform control of repeating a write operation, a write verify operation, and a step-up operation, the write operation being an operation to apply a write pulse voltage to a selected one of the memory cells for data-write and to apply an intermediate voltage having a voltage value smaller than the write pulse voltage to at least an unselected one of the memory cells adjacent to the selected one of the memory cells, the write verify operation being an operation to verify whether data-write is completed or not, and the step-up operation being an operation to raise the write pulse voltage by a certain step-up value if data-write is not completed,
• the control unit being configured to control the step-up operation such that the write pulse voltage is raised by a first step-up value or a second step-up value, the second step-up value being smaller than the first step-up value, and
• the control unit being configured to control the step-up operation such that,
• during a first period when a certain data-write to the selected one of the memory cells is completed, the write pulse voltage is raised by the second step-up value,
• whereas during a second period other than the first period, the write pulse voltage is raised by the first step-up value.

A method of operating a nonvolatile semiconductor memory device, the nonvolatile semiconductor memory device comprising a memory cell array having electrically rewritable nonvolatile memory cells arranged therein, the method comprising:

• repeating a write operation, a write verify operation, and a step-up operation, by a control unit, the write operation being an operation to apply a write pulse voltage to a selected one of the memory cells for data-write and to apply an intermediate voltage having a voltage value smaller than the write pulse voltage to at least an unselected one of the memory cells adjacent to the selected one of the memory cells, the write verify operation being an operation to verify whether data-write is completed or not, and the step-up operation being an operation to raise the write pulse voltage by a certain step-up value if data-write is not completed;
• controlling the step-up operation, by the control unit, such that, in a first period when the number of times of applications of the write pulse voltage is less than a first number, the intermediate voltage is maintained at a constant value, and, in a second period when the number of times of applications of the write pulse voltage is not less than the first number, the intermediate voltage is raised by a certain step-up value;
• and
• controlling the step-up operation, by the control unit, such that the first period includes an operation to raise the write pulse voltage by a first step-up value, and the second period includes an operation to raise the write pulse voltage by a second step-up value, the second step-up value being smaller than the first step-up value.