Multiple bit phase change memory cell
AssigneesInteruniversitair Microelektronica Centrum vzw, NXP B.V.
InventorsLudovic R.A. Goux, Thomas Gille, Judit G. Lisoni, Dirk J.C.C.M. Wouters
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Abstract
A phase change memory cell has more than one memory region (14,18) each being a narrowed region of phase change memory material (2) extending between first and second electrodes (4,6). Each of the plurality of memory regions (14, 18) can be programmed to be in a low resistance state or a high resistance state by applying suitable programming conditions of current and/or voltage. The resistances of the high resistance states and the programming conditions to convert the high resistance states to the low resistance state are different in each of the plurality of memory regions.
Claims11
A phase change memory cell, comprising:
- a phase change memory material extending between first and second electrodes;
- and
- a plurality of memory regions in the phase change memory material between the first and second electrodes,
- wherein each of the plurality of memory regions can be programmed to be in a low resistance state or a high resistance state by applying suitable programming conditions of current and/or voltage;
- and
- the different memory regions have different resistances of the high resistance states and different the programming conditions to convert between the high resistance state and the low resistance state.
A method of operation of a phase change memory cell extending between first and second electrodes having a plurality of memory regions in the phase change memory material between the first and second electrodes, each of the plurality of memory regions being programmable to be in a low resistance state or a high resistance state by applying suitable programming conditions of current and/or voltage, the resistances of the high resistance states and the programming conditions to convert between the high resistance states and the low resistance state being different in each of the plurality of memory regions.
- the method comprising:
- measuring the resistance between the first and second electrodes;
- and
- determining which of the memory regions are in the high resistance state and which in the low resistance state from the measured resistance.
Dependencies are inferred from the claim text.