Semiconductor memory device and method for inspecting the same
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorToshihiko Saito
Life of this patent
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Abstract
When the threshold voltage Vth of the transistor in the memory cell is within the allowable range is determined, a memory cell which does not have sufficient data retention characteristics is eliminated. In order to eliminate such a memory cell, the potential of a gate of the transistor is kept at an appropriate potential VGM and the potential of a drain of the transistor is set higher than or equal to VGM. When data is written to the memory cell in this state, the potential of a source of the transistor is expressed as a formula including the threshold voltage Vth, (VGM−Vth). By comparison between the level of the potential and the level of a reference potential, whether the threshold voltage Vth is within the allowable range can be determined.
Claims23
A method for inspecting a semiconductor memory device comprising a memory cell including a capacitor and a transistor, one of a source and a drain of the transistor being connected to the capacitor, the method comprising the steps of:
- turning on the transistor to accumulate electrical charge in the capacitor;
- turning off the transistor and setting the other of the source and the drain of the transistor to a floating state;
- and
- applying a voltage to a gate of the transistor and inspecting a potential of the other of the source and the drain of the transistor to decide whether applying the voltage to the gate of the transistor makes the potential change or not.
A method for inspecting a semiconductor memory device comprising a memory cell including a capacitor and a transistor, one of a source and a drain of the transistor being connected to the capacitor, the method comprising the steps of:
- turning on the transistor to accumulate electrical charge in the capacitor;
- turning off the transistor and setting the other of the source and the drain of the transistor to a floating state;
- applying a first voltage to a gate of the transistor and inspecting a potential of the other of the source and the drain of the transistor whether the potential is changed before and after applying the first voltage to the gate of the transistor;
- and
- applying a second voltage to the gate of the transistor and inspecting the potential of the other of the source and the drain of the transistor whether applying the voltage to the gate of the transistor makes the potential change or not,
- wherein the first voltage is lower than the second voltage.
A semiconductor memory device comprising:
- a memory cell comprising a capacitor and a transistor;
- and
- a means for supplying a potential from the outside to a gate of the transistor,
- wherein a source of the transistor is connected to the capacitor, and
- wherein the potential is higher than or equal to normal threshold voltage of the transistor and is not used in normal data writing.
Dependencies are inferred from the claim text.