Write verify method for resistive random access memory
AssigneeSeagate Technology LLC
InventorsHaiwen Xi, Song S. Xue
Life of this patent
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Abstract
Write verify methods for resistance random access memory (RRAM) are provided. The methods include applying a reset operation voltage pulse across a RRAM cell to change a resistance of the RRAM cell from a low resistance state to a high resistance state and applying a forward resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance value less than a selected lower resistance limit value. The method also includes applying a reverse resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance values is greater than a selected upper resistance limit value. The reverse resetting voltage pulse has a second polarity being opposite the first polarity.
Claims20
A write verify method for resistance random access memory (RRAM), the method comprising:
- providing a RRAM cell having a high resistance state, the high resistance state having a range of resistance values;
- applying a forward resetting voltage pulse across the RRAM cell if any of a range of high resistance state resistance values is less than a selected lower resistance limit value, the forward resetting voltage pulse having a first polarity;
- and
- applying a reverse resetting voltage pulse across the RRAM cell if any of the range of high resistance state resistance values is greater than a selected upper resistance limit value, the reverse resetting voltage pulse having a second polarity being opposite the first polarity.
A write verify method for multi-bit resistance random access memory (RRAM), the method comprising:
- providing a multi-bit RRAM cell having a first high resistance state, the first high resistance state having a first range of resistance values;
- applying a forward resetting voltage pulse across the RRAM cell if any of a range of first range of high resistance state resistance values is less than a selected first lower resistance limit value, the forward resetting voltage pulse having a first polarity;
- applying a reverse resetting voltage pulse across the RRAM cell if any of the first range of high resistance state resistance values is greater than a selected first upper resistance limit value, the reverse resetting voltage pulse having a second polarity being opposite the first polarity;
- and
- repeating the providing step, and applying a forward resetting voltage pulse step, and applying a reverse resetting voltage pulse for each remaining high resistance state of the multi-bit RRAM cell.
A method comprising:
- applying a reset operation voltage pulse across a RRAM cell, the reset operation voltage pulse changing a resistance of the RRAM cell from a low resistance state to a high resistance state;
- applying a forward resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance value less than a selected lower resistance limit value;
- and
- applying a reverse resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance values is greater than a selected upper resistance limit value.
Dependencies are inferred from the claim text.