Integrated Circuit Package With Reduced Parasitic Loop Inductance
AssigneeInfineon Technologies North America Corp.
InventorJens Ejury
Life of this patent
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Abstract
A multi-layer integrated circuit package includes a switched-mode power supply circuit including a plurality of transistors which form part of a main current loop of the switched-mode power supply circuit. The plurality of transistors are arranged in one or more layers of the integrated circuit package. The package further includes a conductive plate arranged in a different layer of the integrated circuit package than the plurality of transistors. The conductive plate is in close enough proximity to at least part of the main current loop so that a current can be electromagnetically induced in the conductive plate responsive to a change in current in the main current loop.
Claims26
An integrated circuit package, comprising:
- a switched-mode power supply circuit including a plurality of transistors and a capacitor coupled together to form a main current loop having a parasitic loop inductance;
- and
- a conductive plate spaced apart from the plurality of transistors and capacitor by one or more insulator layers of the integrated circuit package, the conductive plate positioned within the integrated circuit package over at least a portion of the main current loop, the conductive plate configured to reduce the parasitic loop inductance of the main current loop without carrying current flowing in the main current loop.
A method of operating an integrated circuit, comprising:
- providing an integrated circuit package with a switched-mode power supply circuit including a plurality of transistors and a capacitor coupled together to form a main current loop having a parasitic loop inductance, and a conductive plate spaced apart from the plurality of transistors and capacitor by one or more insulator layers and positioned over at least a portion of the main current loop;
- and
- reducing the parasitic loop inductance of the main current loop by electromagnetically inducing a current in the conductive plate of the integrated circuit package without the conductive plate carrying current flowing in the main current loop.
A multi-layer integrated circuit package, comprising:
- a switched-mode power supply circuit including a plurality of transistors which form part of a main current loop of the switched-mode power supply circuit, the plurality of transistors arranged in one or more layers of the integrated circuit package;
- and
- a conductive plate arranged in a different layer of the integrated circuit package than the plurality of transistors in close enough proximity to at least part of the main current loop so that a current can be electromagnetically induced in the conductive plate responsive to a change in current in the main current loop.
A method of fabricating a multi-layer integrated circuit package, comprising:
- arranging a plurality of transistors of a switched-mode power supply circuit in one or more layers of the integrated circuit package to form part of a main current loop of the switched-mode power supply circuit;
- and
- arranging a conductive plate in a different layer of the integrated circuit package than the plurality of transistors in close enough proximity to at least part of the main current loop so that a current can be electromagnetically induced in the conductive plate responsive to a change in current in the main current loop.
Dependencies are inferred from the claim text.