VLSI Package for High Performance Integrated Circuit

An integrated circuit to be placed on a printed circuit board (PCB) providing power lines and data access channels;

• comprising:
• a circuit substrate having formed thereon active components including a SerDes circuit located at a center portion of the circuit substrate;
• a package substrate having formed thereon transmit and receive data channels, and power lines;
• wherein:
• the data channels in the package substrate are coupled to the active components of the circuit substrate by conducting bumps;
• the power lines and the data access channels in the PCB are respectively coupled to the power lines and the transmit and receive data channels in the package substrate through conducting balls;
• the conducting balls coupling the data access channels in the PCB to the transmit and receive data channels in the package substrate are located along the edges of the package substrate;
• the conducting balls coupling the power lines in the PCB and the power lines in the package substrate are located in an interior portion of the package substrate.

A method of forming a packaged memory circuit to be coupled to a printed circuit board (PCB) layer providing power lines and data access channels, the packaged memory comprising:

• a package substrate having data channels and power lines formed thereon;
• a circuit substrate having functional components formed therein, the method comprising the steps of:
• (i) forming power lines and the data channels on the package substrate coupled to the functional components of the circuit substrate by conducting bumps;
• (ii) forming power lines and the data access channels on the PCB coupled to the data channels and power lines of the package substrate through conducting balls;
• (iii) forming conducting balls coupling the data access channels of the PCB and the data channels in the package substrate along the edges of the package substrate;
• and
• (iv) forming conducting balls coupling the power lines in the PCB and the power lines in the package substrate in an interior portion of the package substrate.