Package substrate, module and electric/electronic devices using the same

A package substrate comprising:

• a first conductive layer having plural first terminal pattern portions connected to a semiconductor part loaded on a first principal surface through plural first external connection conductors, which is formed on the first principal surface;
• a second conductive layer having plural second terminal patterns connected to a system substrate mounted on a second principal surface opposite to the first principal surface through a second external connection conductor, which is formed on the second principal surface;
• an intermediate conductive layer formed between the first conductive layer and the second conductive layer;
• interlayer insulating layers formed between the first conductive layer and the intermediate conductive layer as well as between the second conductive layer and the intermediate conductive layer;
• and
• plural interlayer connection conductors stacked for connecting between the first conductive layer and the second conductive layer so as to pierce through the interlayer insulating layers,
• wherein the first terminal pattern portions, the first external connection conductors, the interlayer connection conductors, the second terminal pattern portions and the second external connection conductor are connected,
• current paths connecting the semiconductor part and the system substrate are formed, and
• the current paths positioned corresponding to a central portion area including a central portion of a loading area on which the semiconductor part is loaded have high resistance and the current paths positioned corresponding to a peripheral area outside the central portion area have low resistance.