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US 2012/0068320 A1Published application
Integrated Power Converter Package With Die Stacking
AssigneeMonolithic Power Systems, Inc.
InventorsEric YANG, Jinghai ZHOU, Hunt Hang JIANG
Life of this patent
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Abstract
An integrated circuit for implementing a switch-mode power converter is disclosed. The integrated circuit comprises at least a first semiconductor die having an electrically quiet surface, a second semiconductor die for controlling the operation of said first semiconductor die stacked on said first semiconductor die having said electrically quiet surface and a lead frame structure for supporting said first semiconductor die and electrically coupling said first and second semiconductor dies to external circuitry.
Claims25
A semiconductor device, comprising:
- a first semiconductor die, having a first switching device;
- a second semiconductor die, having a second switching device;
- a third semiconductor die, having control circuits and other periphery circuits;
- and
- a lead frame structure comprising at least a first section and a second section, the lead frame structure being configured to support said first semiconductor die and said second semiconductor die;
- wherein, at least one of said first and second semiconductor dies has an electrically quiet surface for receiving said third semiconductor die such that said third semiconductor die is vertically stacked on said first or second semiconductor die having said surface quiet, a substrate of said third semiconductor die being attached to said electrically quiet surface.
3 more elements
A semiconductor device, comprising:
- a first semiconductor flip-chip die having a top surface and an electrically quiet bottom surface, the first semiconductor flip-chip die comprising a first switching device and a second switching device;
- a second semiconductor die, having control circuits and other periphery circuits;
- and
- a lead frame structure, comprising at least two parts, each part having a plurality of finger shaped structures extended unilaterally outward, for supporting and making electrical contact with said first semiconductor flip-chip die;
- wherein, said second semiconductor die is vertically stacked on said first semiconductor flip-chip die with a substrate of said second semiconductor die being attached to said electrically quiet bottom surface of said first semiconductor flip-chip die.
2 more elements
Dependencies are inferred from the claim text.