Integrated circuit packaging system with stack interconnect and method of manufacture thereof
AssigneeSTATS ChipPAC, Ltd.
InventorsDaeSik Choi, SangMi Park, Oh Han Kim
Life of this patent
Estimating the term…
Loading patent…
AssigneeSTATS ChipPAC, Ltd.
InventorsDaeSik Choi, SangMi Park, Oh Han Kim
Estimating the term…
A method of manufacture of an integrated circuit packaging system includes: forming a connection carrier having base device pads and base interconnect pads on a carrier top side of the connection carrier; connecting a base integrated circuit to the base device pads and mounted over the carrier top side; mounting base vertical interconnects directly on the base interconnect pads; attaching a base package substrate to the base integrated circuit and directly on the base vertical interconnects; forming a base encapsulation on the base package substrate, the base device pads, and the base interconnect pads; and removing a portion of the connection carrier with the base device pads and the base interconnect pads partially exposed opposite the base package substrate.
A method of manufacture of an integrated circuit packaging system comprising:
A method of manufacture of an integrated circuit packaging system comprising:
An integrated circuit packaging system comprising:
Dependencies are inferred from the claim text.