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US 2012/0068270 A1Published application
Semiconductor device and manufacturing method of the device
AssigneePanasonic Corporation
InventorSatoru GOTOU
Life of this patent
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Abstract
A semiconductor device includes a first transistor including a gate electrode formed on semiconductor substrate with a gate insulating film interposed therebetween, a first sidewall formed on each side surface of the first gate electrode, and a source/drain diffusion layer; and a second transistor including a gate electrode formed on the semiconductor substrate with the gate insulating film interposed therebetween, a first sidewall formed on each side surface of the second gate electrode, a second sidewall formed outside the first sidewall. A nickel silicide layer is formed in each of upper portions of the gate electrode and the source/drain regions in a silicide formation region. The first sidewall is resistant an etching material used for etching the second sidewall.
Claims16
A semiconductor device comprising:
- a first transistor including
- a first gate electrode formed on a semiconductor region with a first gate insulating film interposed therebetween,
- a first sidewall formed on a side surface of the first gate electrode,
- first source/drain regions, each formed in an upper portion of the semiconductor region at a side of the first gate electrode;
- and
- a second transistor including
- a second gate electrode formed on the semiconductor region with a second gate insulating film interposed therebetween,
- a second sidewall formed on a side surface of the second gate electrode,
- a third sidewall formed outside the second sidewall, and
- second source/drain regions, each formed in an upper portion of the semiconductor region at a side of the second gate electrode, wherein
- a silicide layer is formed in each of upper portions of the first gate electrode and the first source/drain regions in the first transistor,
- no silicide layer is formed in each of upper portions of the second gate electrode and the second source/drain regions in the second transistor, and
- the first sidewall is resistant to an etching material used for etching the third sidewall.
10 more elements
A manufacturing method of a semiconductor device comprising the steps of:
- (a) sequentially forming a first gate insulating film and a first gate electrode in a silicide formation region on a semiconductor region, and sequentially forming a second gate insulating film and a second gate electrode in a non-silicide-formation region on the semiconductor region;
- (b) sequentially forming a first sidewall on a side surface of the first gate insulating film and a side surface of the first gate electrode, and a second sidewall on a side surface of the second gate insulating film and a side surface of the second gate electrode;
- (c) after the step (b), forming first source/drain regions, each formed in an upper portion of the semiconductor region at a side of the first gate electrode, and forming second source/drain regions, each formed in an upper portion of the semiconductor region at a side of the second gate electrode;
- (d) after the step (c), sequentially forming a first protective film and a second protective film above the semiconductor region from the silicide formation region to the non-silicide-formation region;
- (e) selectively removing the second protective film included in the silicide formation region;
- (f) removing the first protective film and the second sidewall in the silicide formation region using the second protective film remaining in the non-silicide-formation region as a mask;
- and
- (g) forming a metal silicide layer in each of upper portions of the first gate electrode and the first source/drain regions by forming a metal film on the semiconductor region and heating the formed metal film, while forming no metal silicide layer in each of upper portions of the second gate electrode and the second source/drain regions.
5 more elements
A manufacturing method of a semiconductor device comprising the steps of:
- (a) sequentially forming a first gate insulating film and a first gate electrode in a silicide formation region on a semiconductor region, and sequentially forming a second gate insulating film and a second gate electrode in a non-silicide-formation region on the semiconductor region;
- (b) sequentially forming a first sidewall on a side surface of the first gate insulating film and a side surface of the first gate electrode, and a second sidewall on a side surface of the second gate insulating film and a side surface of the second gate electrode;
- (c) after the step (b), forming first source/drain regions, each formed in an upper portion of the semiconductor region at a side of the first gate electrode, and forming second source/drain regions, each formed in an upper portion of the semiconductor region at a side of the second gate electrode;
- (d) after the step (c), forming a protective film above the semiconductor region from the silicide formation region to the non-silicide-formation region;
- (e) selectively removing the protective film and the second sidewall included in the silicide formation region;
- and
- (f) forming a metal silicide layer in each of upper portions of the first gate electrode and the first source/drain regions by forming a metal film on the semiconductor region and heating the formed metal film.
4 more elements
Dependencies are inferred from the claim text.