Integrated MOSFET Device and Method with Reduced Kelvin Contact Impedance and Breakdown Voltage

A semiconductor device, expressed in an X-Y-Z Cartesian coordinate system with the X-Y plane parallel to its major semiconductor chip plane, comprising:

• a drain lying parallel to X-Y plane with an epitaxial layer overlaying the drain;
• a Kelvin-contact body disposed in the epitaxial layer with a Kelvin-contact source embedded in the Kelvin-contact body;
• a gate trench extending parallel to Z-axis into the epitaxial layer with a gate disposed in the gate trench;
• a lower contact trench extending parallel to Z-axis through the Kelvin-contact source and at least part of the Kelvin-contact body defining respectively an exposed vertical source-contact surface and an exposed vertical body-contact surface thereon;
• a dielectric material layer located atop the Kelvin-contact source and the gate trench;
• and
• a metal layer located atop the dielectric material layer wherein the two layers are patterned such that:
• a) the dielectric material layer has an upper trench extension located atop the lower contact trench;
• b) the X-Y cross sectional size of the upper trench extension is larger than that of the lower contact trench by an amount whereby defining a planar ledge located parallel to X-Y plane and directly atop a portion of the Kelvin-contact source;
• c) the metal layer has a top metal plane, substantially parallel to X-Y plane, with an upper electrode extension and a lower electrode section successively extending downwards and respectively through the upper trench extension and the lower contact trench;
• and
• d) a correspondingly formed MOSFET device, with its primary device current flowing between the Kelvin-contact source and the drain under control of the gate, exhibits a lowered body Kelvin contact impedance and, owing to an added exposed top contact surface area of the Kelvin-contact source from the planar ledge, a source Kelvin contact impedance that is lower than an otherwise MOSFET device without said planar ledge;
• and
• e) the lower electrode section and the epitaxial layer form a corresponding Schottky diode in parallel with the MOSFET device.