Three dimensional semiconductor memory device and method for fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorsSang-Yong PARK, Jintaek PARK
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Abstract
A three-dimensional semiconductor device includes a stacked structure including a plurality of conductive layers stacked on a substrate, a distance along a first direction between sidewalls of an upper conductive layer and a lower conductive layer being smaller than a distance along a second direction between sidewalls of the upper conductive layer and the lower conductive layer, the first and second directions crossing each other and defining a plane parallel to a surface supporting the substrate, and vertical channel structures penetrating the stacked structure.
Claims20
A three-dimensional semiconductor device, comprising:
- a stacked structure including a plurality of conductive layers stacked on a substrate, a distance along a first direction between sidewalls of an upper conductive layer and a lower conductive layer being smaller than a distance along a second direction between sidewalls of the upper conductive layer and the lower conductive layer, the first and second directions crossing each other and defining a plane parallel to a surface supporting the substrate;
- and
- vertical channel structures penetrating the stacked structure.
A three-dimensional semiconductor device, comprising:
- a first stacked structure on a substrate, the first stacked structure including a first memory region penetrated by a first vertical channel structure and a first pad region adjacent the first memory region;
- and
- a second stacked structure on the first stacked structure, the second stacked structure including a second memory region penetrated by a second vertical channel structure and a second pad region adjacent the second memory region,
- wherein in a plan view, major axes of the first and second stacked structures cross each other.
A three-dimensional semiconductor device, comprising:
- a first stacked structure including a plurality of conductive layers stacked on a substrate, the first stacked structure including a memory region and at least one pad region adjacent a first side of the memory region along a first direction;
- a vertical channel structure penetrating the conductive layers in the memory region;
- and
- pads on the conductive layers in the pad region,
- wherein a distance along the first direction between sidewalls of sequentially arranged conductive layers is larger than a distance along a second direction between sidewalls of the sequentially arranged conductive layers, the first and second directions crossing each other and defining a plane parallel to a surface supporting the substrate.
Dependencies are inferred from the claim text.