Semiconductor memory device

Abstract

According to one embodiment, there is provided a semiconductor memory device including an element region, a first gate insulating film, a charge accumulation layer, a second gate insulating film, a control gate electrode, and a control gate electrode. The charge accumulation layer covers the first gate insulating film. The second gate insulating film has a first portion and a second portion. The first portion covers an upper surface of the charge accumulation layer when a side of a surface on which the element region of the semiconductor substrate is demarcated is an upper side. The second portion covers a side surface of the charge accumulation layer. The control gate electrode covers the upper surface and the side surface of the charge accumulation layer via the second gate insulating film. A breakdown voltage of the first portion is higher than a breakdown voltage of the second portion.

Dependencies are inferred from the claim text.