Transistors having stressed channel regions and methods of forming transistors having stressed channel regions

Abstract

A method of forming a field effect transistor and a field effect transistor. The method includes (a) forming gate stack on a silicon layer of a substrate; (b) forming two or more SiGe filled trenches in the silicon layer on at least one side of the gate stack, adjacent pairs of the two or more SiGe filled trenches separated by respective silicon regions of the silicon layer; and (c) forming source/drains in the silicon layer on opposite sides of the gate stack, the source/drains abutting a channel region of the silicon layer under the gate stack.

Dependencies are inferred from the claim text.