Structure and method for increasing strain in a device
AssigneeInternational Business Machines Corporation
InventorsKEVIN K. CHAN, Abhishek Dube, Viorel C. Ontalus
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AssigneeInternational Business Machines Corporation
InventorsKEVIN K. CHAN, Abhishek Dube, Viorel C. Ontalus
Estimating the term…
A method and structure are disclosed for increasing strain in a device, specifically an n-type field effect transistor (NFET) complementary metal-oxide-semiconductor (CMOS) device. Embodiments of this invention include growing an epitaxial layer, performing a cold carbon or cluster carbon pre-amorphization implantation to implant substitutional carbon into the epitaxial layer, forming a tensile cap over the epitaxial layer, and then annealing to recrystallize the amorphous layer to create a stress memorization technique (SMT) effect. The epitaxial layer will therefore include substitutional carbon and have a memorized tensile stress induced by the SMT. Embodiments of this invention can also include a lower epitaxial layer under the epitaxial layer, the lower epitaxial layer comprising for example, a silicon carbon phosphorous (SiCP) layer.
A method to enhance channel conduction by increasing strain in a device having a source region and a drain region, the method comprising:
An n-type field effect transistor (NFET) complementary metal-oxide-semiconductor (CMOS) device having a source region and a drain region, the NFET CMOS comprising:
Dependencies are inferred from the claim text.