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US 2012/0068144 A1Published application
Resistance random access memory
AssigneeKabushiki Kaisha Toshiba
InventorsRyota FUJITSUKA, Masahiro KIYOTOSHI, Katsuyuki SEKINE, Mitsuru SATO
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Abstract
According to one embodiment, there are provided a first electrode, a second electrode, first and second variable-resistance layers that are arranged between the first electrode and the second electrode, and at least one non variable-resistance layer that is arranged so that positions of the first and second variable-resistance layers between the first electrode and the second electrode are symmetrical to each other.
Claims20
A resistance random access memory comprising:
- a first electrode;
- a second electrode;
- a first variable-resistance layer and a second variable-resistance layer that are arranged between the first electrode and the second electrode;
- and
- at least one non variable-resistance layer that is arranged so that positions of the first variable-resistance layer and the second variable-resistance layer between the first electrode and the second electrode are symmetrical to each other.
2 more elements
Dependencies are inferred from the claim text.