Bit mask extract and pack for boundary crossing data
AssigneeLSI Corporation
InventorsNimrod Alexandron, Alexander Rabinovitch, Leonid Dubrovin
Life of this patent
Estimating the term…
Abstract
An apparatus having a first circuit and a second circuit is disclosed. The first circuit may be configured to generate a plurality of packed items by extracting-and-packing a plurality of input data words based on a bit mask. The second circuit may be configured to (i) receive the packed items from the first circuit, (ii) sequentially buffer the packed items in a plurality of registers, at least one of the packed items crossing a boundary between a current one of the registers and a next one of the registers, and (iii) write the packed items in the current register to a memory in response to the current register becoming full.
Claims20
An apparatus comprising:
- a first circuit configured to generate a plurality of packed items by extracting-and-packing a plurality of input data words based on a bit mask;
- and
- a second circuit configured to (i) receive said packed items from said first circuit, (ii) sequentially buffer said packed items in a plurality of registers, at least one of said packed items crossing a boundary between a current one of said registers and a next one of said registers, and (iii) write said packed items in said current register to a memory in response to said current register becoming full.
An apparatus comprising:
- a first circuit configured to generate a plurality of output words by unpacking-and-padding a plurality of packed items based on a bit mask;
- and
- a second circuit configured to (i) read a plurality of stored data words from a memory, each of said stored data words having greater than one of said packed items, (ii) sequentially buffer said stored data words in a plurality of registers, at least one of said packed items crossing a boundary between a current one of said registers and a next one of said registers, and (iii) copy said packed items from said registers to said first circuit.
An apparatus comprising:
- means for generating a plurality of packed items by extracting-and-packing a plurality of input data words based on a bit mask;
- and
- means for transferring configured to (i) receive said packed items from said means for generating, (ii) sequentially buffer said packed items in a plurality of registers, at least one of said packed items crossing a boundary between a current one of said registers and a next one of said registers, and (iii) write said packed items in said current register to a memory in response to said current register becoming full.
Dependencies are inferred from the claim text.