Avoiding Cross-Interrogates in a Streaming Data Optimized L1 Cache
AssigneeInternational Business Machines Corporation
InventorsChristian Habermann, Christian Jacobi, Martin Recktenwald, Hans-Werner Tast
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AssigneeInternational Business Machines Corporation
InventorsChristian Habermann, Christian Jacobi, Martin Recktenwald, Hans-Werner Tast
Estimating the term…
A mechanism is provided for avoiding cross-interrogates for a streaming data optimized level one cache. The mechanism adds a set of dedicated registers, referred to as “copex registers,” to track ownership of the cache lines that the co-processor's L1 cache holds exclusive. The mechanism extends the cache directory of the L2 cache by a bit that identifies exclusive ownership of a cache line in the co-processor cache. The co-processor continuously provides an indication of which copex registers are valid. On any action that requires a directory lookup in the L2 cache, the mechanism compares the valid copex registers against the lookup address in parallel to the directory lookup. The mechanism considers the “exclusive ownership in co-processor” bit in the directory valid only if the cache line is also currently in a valid copex register.
A method, in a data processing system, for avoiding cross-interrogates for a streaming data optimized cache, the method comprising:
A computer program product comprising a computer readable storage medium having a computer readable program stored therein, wherein the computer readable program, when executed on a computing device, causes the computing device to:
A cache lookup apparatus, comprising:
Dependencies are inferred from the claim text.