Hardware assistance for shadow page table coherence with guest page mappings
AssigneeVMware, Inc.
InventorsKeith ADAMS, Sahil RIHAN
Life of this patent
Estimating the term…
Abstract
Some embodiments of the present invention include a memory management unit (MMU) configured to, in response to a write access targeting a guest page mapping of a guest virtual page number (GVPN) to a guest physical page number (GPPN) within a guest page table, identify a shadow page mapping that associates the GVPN with a physical page number (PPN). The MMU is also configured to determine whether a traced write indication is associated with the shadow page mapping and, if so, record update information identifying the targeted guest page mapping. The update information is used to reestablish coherence between the guest page mapping and the shadow page mapping. The MMU is further configured to perform the write access.
Claims20
An apparatus comprising:
- a hardware memory management unit configured to:
- in response to a write access to a first guest virtual page number (GVPN), identify a first shadow page mapping that maps the first GVPN to a physical page number (PPN);
- determine whether a traced write indication is associated with the first shadow page mapping, wherein such a traced write indication signifies that a memory page addressed by the PPN contains at least part of a guest page table, so that the write access would be to an entry of the guest page table, the entry of the guest page table providing a mapping for a second GVPN;
- record update information when a traced write indication is associated with the first shadow page mapping, wherein the update information is later used to reestablish coherence between the entry of the guest page table and a second shadow page mapping, the second shadow page mapping also providing a mapping for the second GVPN;
- and
- perform the write access.
A method of providing hardware system support for a virtualization system, the method comprising:
- in response to a write access to a first guest virtual page number (GVPN), identifying, by a hardware memory management unit (MMU), a first shadow page mapping that maps the first GVPN to a physical page number (PPN);
- determining, by the hardware MMU, whether a traced write indication is associated with the first shadow page mapping, wherein such a traced write indication signifies that a memory page addressed by the PPN contains at least part of a guest page table, so that the write access would be to an entry of the guest page table, the entry of the guest page table providing a mapping for a second GVPN;
- recording, by the hardware MMU, update information identifying the entry of the guest page table when a traced write indication is associated with the first shadow page mapping, wherein the update information is later used to reestablish coherence between the entry of the guest page table and a second shadow page mapping, the second shadow page mapping also providing a mapping for the second GVPN;
- and
- performing the write access by the hardware MMU.
Dependencies are inferred from the claim text.