Processor emulation using fragment level translation

An apparatus for emulating a target system on a host system having one or more processors, comprising:

• one or more processors coupled to a memory;
• and
• one or more processor executable instructions adapted to be executed by the one or more processors to emulate a target system, wherein the one or more processor executable instructions include:
• one or more instructions that, when executed group two or more target system code instructions for the secondary target processor into one or more fragments;
• one or more instructions that, when executed, translate each fragment into a corresponding set of position-independent instructions executable by the host system;
• and
• one or more instructions that, when executed load one or more fragments into the host system, determine if a memory layout for target system code corresponding to the one or more fragments has changed, dynamically re-link the one or more fragments without retranslating the one or more fragments based on changes to the memory layout to produce one or more re-linked fragments, and execute the re-linked fragments with the host system.

An apparatus for emulating a target system on a host system having one or more processors, comprising:

• one or more processors coupled to a memory;
• and
• one or more processor executable instructions adapted to be executed by the one or more processors to emulate a target system having a main target processor, a secondary target processor element and an instruction memory associated with the secondary target processor element, wherein the one or more instructions include:
• a) one or more instruction memory emulation instructions that, when executed, group two or more target system code instructions for the target system into one or more fragments;
• b) one or more main translation instructions that, when executed, translate each fragment into a corresponding set of position-independent instructions executable by the host system;
• and
• c) one or more emulation instructions that, when executed, emulate the target system by loading one or more fragments into the host system, determine if a memory layout for target system code corresponding to the one or more fragments has changed, dynamically re-link the one or more fragments without retranslating the one or more fragments based on changes to the memory layout to produce one or more re-linked fragments, and execute the re-linked fragments on the host system.

A non-transitory computer-readable medium having a set of computer readable instructions embodied therein, the computer-readable instructions being configured to implement a method for emulating a target system with a host system, the computer-readable instructions comprising:

• a) one or more instructions that, when executed, group two or more target system code instructions for the target system into one or more fragments;
• b) one or more instructions that, when executed, translate each fragment into a corresponding set of position-independent instructions executable by the host system;
• and
• c) one or more instructions that, when executed, emulate the target system by loading one or more fragments into the host system, determine if a memory layout for target system code corresponding to the one or more fragments has changed, dynamically re-link the one or more fragments without retranslating the one or more fragments based on changes to the memory layout to produce one or more re-linked fragments, and execute the re-linked fragments on the host system.