Field effect transistor and method for manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsChang-Woo Oh, Dong-Gun Park, Dong-Won Kim, Dong-Uk Choi, Kyoung-Hwan Yeo
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Abstract
A field effect transistor (FET) and a method for manufacturing the same, in which the FET may include an isolation film formed on a semiconductor substrate to define an active region, and a gate electrode formed on a given portion of the semiconductor substrate. A channel layer may be formed on a portion of the gate electrode, with source and drain regions formed on either side of the channel layer so that boundaries between the channel layer and the source and drain regions of the FET may be perpendicular to a surface of the semiconductor substrate.
Claims21
A method of forming a field effect transistor (FET), comprising:
- forming a channel layer with a semiconductor substrate;
- forming a gate oxide layer on the channel layer;
- forming a gate electrode material on the gate oxide layer;
- forming a mask layer on the gate electrode material;
- patterning the gate electrode material using the mask layer to form a gate electrode;
- forming spacers;
- etching the channel layer using the spacers as a mask for defining regions reserved for a source region and a drain region;
- and
- forming an impurity-containing epitaxial layer in the defined regions to form the source and drain regions.
The method of claim 2, wherein the FET is a FinFET and the step of forming a channel layer comprises forming a protruded channel layer.
A method of forming a FinFET comprising:
- providing a semiconductor substrate with a protrusion, the protrusion having a top surface and opposite side surfaces;
- forming a layer on the protrusion;
- patterning the layer to form a line pattern from the layer, the line pattern extending across the top surface of the protrusion;
- removing a first portion of the protrusion on a first side of the line pattern at a first location;
- removing a second portion of the protrusion on a second side of the line pattern at a second location, a remaining portion of the protrusion under the line pattern and defined by the removal of the first and second portions of the protrusion comprising a channel region of the FinFET;
- eptitaxially growing a source region of the FinFET at the first location of the semiconductor substrate and a drain region of the FinFET at the second location of the semiconductor substrate, the channel region being interposed between the source region and the drain region.
A method of forming a FinFET comprising:
- forming a fin extending from a semiconductor substrate, the fin comprising a crystalline semiconductor material;
- forming a gate structure including sidewall spacers;
- removing first and second portions of the fin to respective first and second locations;
- epitaxially growing a drain region of the FinFET at the first location of the semiconductor substrate and epitaxially growing a source region of the FinFET at the second location of the semiconductor substrate,
- wherein a channel region of the FinFET is formed from the fin at a location under the gate structure and between the drain region and the source region.
Dependencies are inferred from the claim text.