Data input circuit of nonvolatile memory device
AssigneeHynix Semiconductor Inc.
InventorsJong Tai Park, Won Sub Song
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Abstract
The data input circuit of a nonvolatile memory device includes a redundancy multiplexer configured to selectively output normal data and redundancy data to an internal global data line in response to a redundancy signal, a plurality of pipe registers coupled to the internal global data line and configured to latch normal data or redundancy data received through the internal global data line in response to a plurality of respective latch signals, and an output multiplexer configured to sequentially output the latched data in response to a plurality of selection signals.
Claims14
A data input circuit of a nonvolatile memory device, comprising:
- a redundancy multiplexer configured to selectively output normal data and redundancy data to an internal global data line in response to a redundancy signal;
- a plurality of pipe registers each coupled to the internal global data line and configured to latch the normal data or the redundancy data received through the internal global data line in response to a plurality of respective latch signals;
- and
- an output multiplexer configured to sequentially output the latched data in response to a plurality of selection signals.
A data input circuit of a nonvolatile memory device, comprising:
- a plurality of pipe registers each coupled to a global data line and a redundancy global data line and configured to sequentially latch normal data received through the global data line or redundancy data received through the redundancy global data line in response to a plurality of respective latch signals;
- and
- an output multiplexer configured to selectively couple the pipe registers to an output line in response to a plurality of selection signals.
Dependencies are inferred from the claim text.