Memory macro configuration and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorSergiy ROMANOVSKYY
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Abstract
A memory macro comprises a plurality of memory array segments, each having a predetermined number of data inputs and outputs. A segment decoder circuit is configured to: receive a first value indicating a number of memory partitions among which the memory array segments are to be divided, and output a plurality of signals for selectively activating one or more of the plurality of memory array segments to be accessed based on the first value. A plurality of output drivers are coupled to the segment decoder circuit and to respective ones of the outputs. The plurality of output drivers are configured to selectively output data from the respective outputs of each of the respective activated memory array segments.
Claims20
A memory macro, comprising:
- a plurality of memory array segments, each having a predetermined number of data inputs and outputs;
- a segment decoder circuit configured to:
- receive a first value indicating a number of memory partitions among which the memory array segments are to be divided, and
- output a plurality of signals for selectively activating one or more of the plurality of memory array segments to be accessed based on the first value;
- and
- a plurality of output drivers coupled to the segment decoder circuit and to respective ones of the outputs, the plurality of output drivers configured to selectively output data from the respective outputs of each of the respective activated memory array segments.
An integrated circuit, comprising:
- an embedded memory macro comprising:
- a plurality of memory array segments, each having a predetermined number of data inputs and outputs;
- a segment decoder circuit configured to:
- receive a first value indicating a number of memory partitions among which the memory array segments are to be divided, and output a plurality of signals for selectively activating one or more of the plurality of memory array segments to be accessed based on the first value;
- and
- a plurality of output drivers coupled to the segment decoder circuit and to respective ones of the outputs, the plurality of output drivers configured to selectively output data from the respective outputs of each of the respective activated memory array segments;
- a circuit configured for performing at least one arithmetic or logical operation on data to be retrieved from or stored in the embedded memory, the circuit having at least a first input and at least a first output, wherein:
- respective data inputs of a plurality of memory array segments in at least one of the partitions are connected to the first output of the circuit by way of a first common node, and
- respective outputs of the plurality of memory array segments in the at least one of the partitions are connected to the first input of the circuit by way of a second common node.
A method, comprising:
- providing a memory macro having a plurality of memory array segments, each having a predetermined number of data inputs and outputs;
- receiving a first value indicating a number of memory partitions among which a plurality of memory array segments in a memory macro are to be divided, and
- selectively activating one or more of the plurality of memory array segments to be accessed based on the first value;
- and
- selectively outputting data from the respective outputs of each of the respective activated memory array segments.
Dependencies are inferred from the claim text.