# US 2012/0056648 A1 · Semiconductor device, electric circuit using the same and method of controlling electric circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2012/0056648 A1 - Document ID: US20120056648A1 - Status: Published application - Kind: A1 - Application number: 13/223,986 - Filed: 2011-09-01 - Published: 2012-03-08 - Earliest claimed: 2010-09-02 - Assignees: Sanken Electric Co., Ltd. - Inventors: Akio IWABUCHI; Hironori Aoki - Web page: https://patentgrep.com/patent/US20120056648A1 ## CPC - H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs} - H03K 17/0822: {in field-effect transistor switches} - H10D 84/01: Manufacture or treatment - H10D 84/05: using Group III-V technology - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract The operation of a HEMT is monitored on an on-chip basis without increasing the power consumption rate. In a semiconductor device 10, an electron supply layer 12 is formed on a channel layer 11. A two-dimensional electron gas (2DEG) layer 13 is formed at the side of the channel layer of the hetero-junction interface. Electrons flow through the 2DEG layer 13 between a source electrode 14 formed on the surface of the electron supply layer 12 and a drain electrode 15 that is formed on the same surface. A potential detection electrode 17 is arranged on the electron supply layer 12 between the gate electrode 16 and the source electrode 14. A resistor 18 having a sufficiently high resistance value makes the electric current flowing to the potential detection electrode 17 negligible relative to the drain current in operation. ## Claims ### Claim 1 A semiconductor device which includes a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer and a source electrode, a drain electrode and a gate electrode formed on the second semiconductor layer, and in which electrons flow between the source electrode and the drain electrode by way of a two-dimensional electron gas layer at the hetero-junction interface of the first semiconductor layer and the second semiconductor layer and a channel where the electrons flow is controlled for on and off by a voltage applied to the gate electrode, wherein a potential detection electrode is formed on the second semiconductor layer on the channel between the source electrode and the gate electrode. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein a resistor having a resistance value of not less than 1 MΩ is connected to the potential detection electrode. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the potential detection electrode is formed by a material adapted to ohmic contact with the second semiconductor layer. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the potential detection electrode is formed by a material adapted to Schottky contact with the second semiconductor layer. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the first semiconductor layer and the second semiconductor layer are formed respectively by nitride semiconductors. ### Claim 6 (depends on 1) An electric circuit which includes more than one arms, each being formed by connecting two switching devices in series between the high side terminal and the low side terminal thereof, and in which the opposite terminals of a coil are connected to the connection points of the two switching devices of the arms, wherein a semiconductor device according to claim 1 is employed as at least the switching device arranged at the low side. ### Claim 7 (depends on 1) An electric circuit which includes more than one arms, each being formed by connecting two switching devices in series between the high side terminal and the low side terminal thereof, and in which the opposite terminals of a coil are connected to the connection points of the switching devices of the arms, wherein a semiconductor device according to claim 1 is arranged in each of the arms with the drain electrode of the semiconductor device connected to the connection point. ### Claim 8 (depends on 1) A method of controlling an electric circuit having a semiconductor device according to claim 1, comprising a first step of controlling a voltage applied to the gate electrode to turn on the semiconductor device when the potential detected by the potential detection electrode is negative. ### Claim 9 (depends on 8) The method of controlling an electric circuit according to claim 8, further comprising a second step of turning off the semiconductor device after the first step when the absolute value of the potential detected by the potential detection electrode becomes smaller than a predetermined value.