Strained asymmetric source/drain

A semiconductor device comprising:

• a substrate;
• a gate formed on the substrate;
• an offset spacer adjacent the gate on the substrate;
• a dopant implanted in the substrate to form a dopant region, wherein the dopant region extends under a portion of the offset spacer on a first side of the gate and does not extend under the offset spacer on a second, opposite side of the gate;
• and
• first and second source/drain (S/D) regions formed in the substrate, such that the first and second S/D regions are asymmetric with respect to the one another.

A method of fabricating a semiconductor device, the method comprising:

• providing a substrate;
• forming a poly gate stack on the substrate;
• performing a dopant implant to the substrate at an implant angle ranging from about 10° to about 25° from perpendicular to the substrate;
• forming a spacer adjacent the poly gate stack on the substrate;
• etching first and second source/drain (S/D) regions in the substrate, wherein the first and second S/D regions are asymmetric with respect to the poly gate stack;
• depositing first and second strained source/drain (S/D) layers respectively into the etched S/D regions in the substrate;
• removing the poly gate stack from the substrate;
• and
• forming a high-k metal gate using a gate-last process where the poly gate stack was removed.