Semiconductor trench isolation including polysilicon and nitride layers
AssigneeSamsung Electronics Co., Ltd.
InventorsDong-kak Lee, Hee-don Hwang
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Abstract
A semiconductor device includes a device isolation pattern in which a polysilicon layer pattern doped with oxygen, carbon or nitrogen is interposed between an inner wall of a trench and a nitride liner. The semiconductor device includes a semiconductor substrate including a trench, a polysilicon layer pattern on a surface of the trench, a nitride layer pattern on the polysilicon layer pattern, and an insulation layer pattern on the nitride layer pattern and filling the trench. The polysilicon layer pattern may be doped with oxygen, carbon and/or nitrogen. Related manufacturing methods are also disclosed.
Claims20
A semiconductor device comprising:
- a semiconductor substrate including a trench therein;
- a polysilicon layer pattern on a surface of the trench;
- a nitride layer pattern on the polysilicon layer pattern, remote from the surface of the trench;
- and
- an insulation layer pattern on the nitride layer pattern, remote from the polysilicon layer pattern.
A semiconductor device, comprising:
- a semiconductor substrate including a trench therein;
- a gate electrode structure on the semiconductor substrate;
- and
- a device isolation pattern in the trench,
- wherein the device isolation pattern comprises:
- a polysilicon layer pattern on a surface of the trench;
- a nitride layer pattern on the polysilicon layer pattern, remote from the surface of the trench;
- and
- an insulation layer pattern on the nitride layer pattern remote from the polysilicon layer pattern,
- wherein the polysilicon layer pattern is doped with impurities.
A semiconductor device comprising:
- a semiconductor substrate including a trench therein;
- a first conformal layer on a surface of the trench;
- a second conformal layer on the first conformal layer, remote from the surface of the trench, the second conformal layer configured to trap carriers of a first conductivity type therein that pull carriers of a second conductivity type from the semiconductor substrate adjacent the surface of the trench into the first conformal layer.
Dependencies are inferred from the claim text.